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authorChris Wilson <chris@chris-wilson.co.uk>2019-09-12 16:23:13 +0300
committerChris Wilson <chris@chris-wilson.co.uk>2019-09-12 22:45:23 +0300
commitee73e2795b416b829f0e00e7c43154922dff495b (patch)
tree302ee1146ecbfc8b2cc95b4b7e0e626d6a5bbbc1 /drivers/gpu/drm/i915/i915_pci.c
parent16ffe73c186b7897a1a6888ffb4949a8b4026624 (diff)
downloadlinux-ee73e2795b416b829f0e00e7c43154922dff495b.tar.xz
drm/i915/tgl: Disable preemption while being debugged
We see failures where the context continues executing past a preemption event, eventually leading to situations where a request has executed before we have event submitted it to HW! It seems like tgl is ignoring our RING_TAIL updates, but more likely is that there is a missing update required for our semaphore waits around preemption. v2: And disable internal semaphore usage Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190912132313.12751-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
-rw-r--r--drivers/gpu/drm/i915/i915_pci.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 698116276441..9236fccb3a83 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -798,6 +798,7 @@ static const struct intel_device_info intel_tigerlake_12_info = {
.engine_mask =
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
.has_rc6 = false, /* XXX disabled for debugging */
+ .has_logical_ring_preemption = false, /* XXX disabled for debugging */
};
#undef GEN