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authorChris Wilson <chris@chris-wilson.co.uk>2017-02-03 14:50:35 +0300
committerChris Wilson <chris@chris-wilson.co.uk>2017-02-03 18:52:56 +0300
commita3a1e5336c41ab3763c64152df5f868cb91d20bf (patch)
tree1f50a376d428e7f3b1959060bf3fe21787dece90 /drivers/gpu/drm/i915/i915_gem_tiling.c
parent52da22e7aba155be238faff4f6e97b2eb9de64f3 (diff)
downloadlinux-a3a1e5336c41ab3763c64152df5f868cb91d20bf.tar.xz
drm/i915: Tidy the tail of i915_tiling_ok()
The current tail breaks the pattern of if (check) return false, which can catch the reader out. If we move the gen2/3 power-of-two test into the earlier gen2/3 branch, we can eliminate the contrary tail. Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170203115036.24743-1-chris@chris-wilson.co.uk Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 974ac08df473..152bed2dcb11 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -158,6 +158,9 @@ i915_tiling_ok(struct drm_i915_gem_object *obj,
if (stride > 8192)
return false;
+ if (!is_power_of_2(stride))
+ return false;
+
if (IS_GEN3(i915)) {
if (obj->base.size > I830_FENCE_MAX_SIZE_VAL << 20)
return false;
@@ -176,12 +179,7 @@ i915_tiling_ok(struct drm_i915_gem_object *obj,
if (!stride || !IS_ALIGNED(stride, tile_width))
return false;
- /* 965+ just needs multiples of tile width */
- if (INTEL_GEN(i915) >= 4)
- return true;
-
- /* Pre-965 needs power of two tile widths */
- return is_power_of_2(stride);
+ return true;
}
static bool i915_vma_fence_prepare(struct i915_vma *vma,