summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_gem_tiling.c
diff options
context:
space:
mode:
authorChris Wilson <chris@chris-wilson.co.uk>2011-03-06 12:03:16 +0300
committerChris Wilson <chris@chris-wilson.co.uk>2011-03-06 12:07:45 +0300
commit0ee537abbd10a9abf11e1c22ee32a68e8c12ed4a (patch)
tree73fb0ea5902c08947ed2f7eb5e6a7adb4d54f516 /drivers/gpu/drm/i915/i915_gem_tiling.c
parent6927faf30920b8c03dfa007e732642a1f1f20089 (diff)
downloadlinux-0ee537abbd10a9abf11e1c22ee32a68e8c12ed4a.tar.xz
Revert "drm/i915: fix corruptions on i8xx due to relaxed fencing"
This reverts commit c2e0eb167070a6e9dcb49c84c13c79a30d672431. As it turns out, userspace already depends upon being able to enable tiling on existing bo which it promises to be large enough for its purposes i.e. it will not access beyond the end of the last full-tile row. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35016 Reported-and-tested-by: Kamal Mostafa <kamal@canonical.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c16
1 files changed, 1 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 79a04fde69b5..22a32b9932c5 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -184,7 +184,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
static bool
i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
{
- int tile_width, tile_height;
+ int tile_width;
/* Linear is always fine */
if (tiling_mode == I915_TILING_NONE)
@@ -215,20 +215,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
}
}
- if (IS_GEN2(dev) ||
- (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)))
- tile_height = 32;
- else
- tile_height = 8;
- /* i8xx is strange: It has 2 interleaved rows of tiles, so needs an even
- * number of tile rows. */
- if (IS_GEN2(dev))
- tile_height *= 2;
-
- /* Size needs to be aligned to a full tile row */
- if (size & (tile_height * stride - 1))
- return false;
-
/* 965+ just needs multiples of tile width */
if (INTEL_INFO(dev)->gen >= 4) {
if (stride & (tile_width - 1))