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authorChris Wilson <chris@chris-wilson.co.uk>2010-12-08 17:28:54 +0300
committerChris Wilson <chris@chris-wilson.co.uk>2010-12-09 22:46:23 +0300
commita8e93126a6f10d0a14ba8407ec112b1b3a5e2e97 (patch)
treee8fd16daba3b15af1425458fadbb1b5c9a016796 /drivers/gpu/drm/i915/i915_gem_gtt.c
parentd1c3b177b9940541e89015a726ac279caf1a21f3 (diff)
downloadlinux-a8e93126a6f10d0a14ba8407ec112b1b3a5e2e97.tar.xz
drm/i915/gtt: Clear the cachelines upon resume
Required for my pineview system to not barf after resuming. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_gtt.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 71c2b0f3747b..86673e77d7cb 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -35,6 +35,8 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
struct drm_i915_gem_object *obj;
list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
+ i915_gem_clflush_object(obj);
+
if (dev_priv->mm.gtt->needs_dmar) {
BUG_ON(!obj->sg_list);
@@ -51,7 +53,6 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
obj->agp_type);
}
- /* Be paranoid and flush the chipset cache. */
intel_gtt_chipset_flush();
}