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authorChangbin Du <changbin.du@intel.com>2016-12-27 08:24:52 +0300
committerZhenyu Wang <zhenyuw@linux.intel.com>2017-01-09 06:05:56 +0300
commita12010534d0984f91bc5bdcf9e27bd55e20d82da (patch)
tree4d2c31974badb72ac329e9e6afc2e1c1264932d7 /drivers/gpu/drm/i915/gvt/handlers.c
parent3e70c5d6ea510e38f612d07fa0fd7487277b7087 (diff)
downloadlinux-a12010534d0984f91bc5bdcf9e27bd55e20d82da.tar.xz
drm/i915/gvt: fix error handing of tlb_control emulation
Return ealier for a invalid access, else it would false set tlb flag for RCS. Signed-off-by: Changbin Du <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/handlers.c')
-rw-r--r--drivers/gpu/drm/i915/gvt/handlers.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 052e57124c0a..e06d5f37bb92 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1367,7 +1367,6 @@ static int ring_mode_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
static int gvt_reg_tlb_control_handler(struct intel_vgpu *vgpu,
unsigned int offset, void *p_data, unsigned int bytes)
{
- int rc = 0;
unsigned int id = 0;
write_vreg(vgpu, offset, p_data, bytes);
@@ -1390,12 +1389,11 @@ static int gvt_reg_tlb_control_handler(struct intel_vgpu *vgpu,
id = VECS;
break;
default:
- rc = -EINVAL;
- break;
+ return -EINVAL;
}
set_bit(id, (void *)vgpu->tlb_handle_pending);
- return rc;
+ return 0;
}
static int ring_reset_ctl_write(struct intel_vgpu *vgpu,