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| author | John Harrison <John.C.Harrison@Intel.com> | 2024-05-29 02:05:15 +0300 |
|---|---|---|
| committer | John Harrison <John.C.Harrison@Intel.com> | 2024-06-07 03:28:55 +0300 |
| commit | 6ef078383a50dded4bb9e71250ea6f7b533a6109 (patch) | |
| tree | 35c0c7278dcf437b13de73a4dc4e6e28d567ad91 /drivers/gpu/drm/i915/gt/uc | |
| parent | ca1a453361cd1cc73752998d1acd8616582c2a64 (diff) | |
| download | linux-6ef078383a50dded4bb9e71250ea6f7b533a6109.tar.xz | |
drm/i915/guc: Enable w/a 16021333562 for DG2, MTL and ARL
Enable another workaround that is implemented inside the GuC.
v2: Use the correct Gen12 w/a id rather than the Xe version (review
feedback from Matthew R) also extend to include ARL.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240528230515.479395-1-John.C.Harrison@Intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/uc')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 32 |
2 files changed, 21 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h index 525587cfe1af..37ff539a6963 100644 --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h +++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h @@ -106,6 +106,7 @@ enum { */ enum { GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE = 0x9001, + GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED = 0x9002, }; #endif /* _ABI_GUC_KLVS_ABI_H */ diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c index c606bb5e3b7b..7995f059f30d 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c @@ -815,23 +815,23 @@ engine_instance_list: return PAGE_ALIGN(total_size); } -/* Wa_14019159160 */ -static u32 guc_waklv_ra_mode(struct intel_guc *guc, u32 offset, u32 remain) +static void guc_waklv_enable_simple(struct intel_guc *guc, + u32 klv_id, u32 *offset, u32 *remain) { u32 size; u32 klv_entry[] = { /* 16:16 key/length */ - FIELD_PREP(GUC_KLV_0_KEY, GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE) | + FIELD_PREP(GUC_KLV_0_KEY, klv_id) | FIELD_PREP(GUC_KLV_0_LEN, 0), /* 0 dwords data */ }; size = sizeof(klv_entry); - GEM_BUG_ON(remain < size); + GEM_BUG_ON(*remain < size); - iosys_map_memcpy_to(&guc->ads_map, offset, klv_entry, size); - - return size; + iosys_map_memcpy_to(&guc->ads_map, *offset, klv_entry, size); + *offset += size; + *remain -= size; } static void guc_waklv_init(struct intel_guc *guc) @@ -850,11 +850,19 @@ static void guc_waklv_init(struct intel_guc *guc) remain = guc_ads_waklv_size(guc); /* Wa_14019159160 */ - if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) { - size = guc_waklv_ra_mode(guc, offset, remain); - offset += size; - remain -= size; - } + if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) + guc_waklv_enable_simple(guc, + GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE, + &offset, &remain); + + /* Wa_16021333562 */ + if ((GUC_FIRMWARE_VER(guc) >= MAKE_GUC_VER(70, 21, 1)) && + (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) || + IS_MEDIA_GT_IP_RANGE(gt, IP_VER(13, 0), IP_VER(13, 0)) || + IS_DG2(gt->i915))) + guc_waklv_enable_simple(guc, + GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED, + &offset, &remain); size = guc_ads_waklv_size(guc) - remain; if (!size) |