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authorMiquel Raynal <miquel.raynal@bootlin.com>2021-06-30 13:52:24 +0300
committerMiquel Raynal <miquel.raynal@bootlin.com>2021-06-30 13:52:24 +0300
commit0bcc3939c98d83955397eac1584d5f791fdc88d0 (patch)
tree21e6be9c578916ca86ffe0f88a9d807435318964 /drivers/gpu/drm/i915/gt/gen7_renderclear.c
parent600d050944e133fde1f54b9113b01ccefbd82820 (diff)
parentc17e5c85b32f8809135f3211ba2525fb98b5c09f (diff)
downloadlinux-0bcc3939c98d83955397eac1584d5f791fdc88d0.tar.xz
Merge tag 'spi-nor/for-5.14' into mtd/next
SPI NOR core changes: - Ability to dump SFDP tables via sysfs - Support for erasing OTP regions on Winbond and similar flashes - Few API doc updates and fixes - Locking support for MX25L12805D SPI NOR controller drivers changes: - Use SPI_MODE_X_MASK in nxp-spifi - Intel Alder Lake-M SPI serial flash support
Diffstat (limited to 'drivers/gpu/drm/i915/gt/gen7_renderclear.c')
-rw-r--r--drivers/gpu/drm/i915/gt/gen7_renderclear.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
index de575fdb033f..21f08e53889c 100644
--- a/drivers/gpu/drm/i915/gt/gen7_renderclear.c
+++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
@@ -397,7 +397,10 @@ static void emit_batch(struct i915_vma * const vma,
gen7_emit_pipeline_invalidate(&cmds);
batch_add(&cmds, MI_LOAD_REGISTER_IMM(2));
batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_0_GEN7));
- batch_add(&cmds, 0xffff0000);
+ batch_add(&cmds, 0xffff0000 |
+ ((IS_IVB_GT1(i915) || IS_VALLEYVIEW(i915)) ?
+ HIZ_RAW_STALL_OPT_DISABLE :
+ 0));
batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_1));
batch_add(&cmds, 0xffff0000 | PIXEL_SUBSPAN_COLLECT_OPT_DISABLE);
gen7_emit_pipeline_invalidate(&cmds);