diff options
| author | Jouni Högander <jouni.hogander@intel.com> | 2024-05-29 12:38:46 +0300 |
|---|---|---|
| committer | Jouni Högander <jouni.hogander@intel.com> | 2024-06-03 11:22:49 +0300 |
| commit | 0a8c581ce01c84214b8221fcc5d52b45c09d0007 (patch) | |
| tree | 98b16fec6a7ffb0c45c85c44a9b5bd5382449ccd /drivers/gpu/drm/i915/display/intel_psr.c | |
| parent | 13d1359d67485c220832594fa044436992597823 (diff) | |
| download | linux-0a8c581ce01c84214b8221fcc5d52b45c09d0007.tar.xz | |
drm/i915/psr: Use enable boolean from intel_crtc_state for Early Transport
When enabling Early Transport use
intel_crtc_state->enable_psr2_su_region_et instead of
psr2_su_region_et_valid.
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-4-jouni.hogander@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_psr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_psr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 73966d011f7b..c9c657fca048 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -710,7 +710,7 @@ void intel_psr_enable_sink(struct intel_dp *intel_dp, DP_ALPM_ENABLE | DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE); - if (psr2_su_region_et_valid(intel_dp)) + if (crtc_state->enable_psr2_su_region_et) dpcd_val |= DP_PSR_ENABLE_SU_REGION_ET; } |