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authorAlex Deucher <alexander.deucher@amd.com>2024-10-01 17:31:26 +0300
committerAlex Deucher <alexander.deucher@amd.com>2024-10-15 18:27:08 +0300
commit3d73327b748baaddf82cfad791fc25f8f1822ffe (patch)
tree84172ff3dc12e7e4c901ce7f2a5b8a7849c4c292 /drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
parent9f7e94af35996effead76ff2837b5ba322e38963 (diff)
downloadlinux-3d73327b748baaddf82cfad791fc25f8f1822ffe.tar.xz
drm/amdgpu/swsmu: add automatic parameter to set_soft_freq_range
On chips that support it, you can specificy 0 and 0xffff for min and max and the PMFW will use that to determine the optimal min and max. This enables optimal performance when the user manually switches between performance levels using sysfs. Previously we'd set soft min/max which could limit performance. Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h')
-rw-r--r--drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 727da0c37e06..8bb32b3f0d9c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -1255,7 +1255,8 @@ struct pptable_funcs {
* @set_soft_freq_limited_range: Set the soft frequency range of a clock
* domain in MHz.
*/
- int (*set_soft_freq_limited_range)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max);
+ int (*set_soft_freq_limited_range)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max,
+ bool automatic);
/**
* @set_power_source: Notify the SMU of the current power source.