diff options
author | JinZe Xu <JinZe.Xu@amd.com> | 2025-04-23 13:17:30 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2025-05-05 19:58:26 +0300 |
commit | a9cbeb6059e93ff893f79e42bf952c3fbb5eafdf (patch) | |
tree | 6266a52c87dde2d815e34e57aa04d6928ed42ffa /drivers/gpu/drm/amd/display | |
parent | 18a77bda7a9b999dc6c04bf6d68b1fc89d8ed4d6 (diff) | |
download | linux-a9cbeb6059e93ff893f79e42bf952c3fbb5eafdf.tar.xz |
drm/amd/display: Send IPSExit unconditionally.
[Why&How]
PMFW needs to flush page cache in IPSExit.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: JinZe Xu <JinZe.Xu@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c index ca6da53f45ad..a3fbb9f5b4a6 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c +++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c @@ -1365,14 +1365,15 @@ static void dc_dmub_srv_exit_low_power_state(const struct dc *dc) if (!dc->debug.optimize_ips_handshake || !ips_fw->signals.bits.ips2_commit) udelay(dc->debug.ips2_eval_delay_us); - if (ips_fw->signals.bits.ips2_commit) { - DC_LOG_IPS( - "exit IPS2 #1 (ips1_commit=%u ips2_commit=%u)", - ips_fw->signals.bits.ips1_commit, - ips_fw->signals.bits.ips2_commit); + DC_LOG_IPS( + "exit IPS2 #1 (ips1_commit=%u ips2_commit=%u)", + ips_fw->signals.bits.ips1_commit, + ips_fw->signals.bits.ips2_commit); - // Tell PMFW to exit low power state - dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr); + // Tell PMFW to exit low power state + dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr); + + if (ips_fw->signals.bits.ips2_commit) { DC_LOG_IPS( "wait IPS2 entry delay (ips1_commit=%u ips2_commit=%u)", |