diff options
| author | Charlene Liu <Charlene.Liu@amd.com> | 2025-04-08 23:35:38 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-04-22 15:51:44 +0300 |
| commit | 8e40dd932037d52e0c599f16057189b4756d2e5c (patch) | |
| tree | 3877f383f14d2d7401f9a7c673cc2352e5dd2ad9 /drivers/gpu/drm/amd/display | |
| parent | 1594b60d74959c0680ddf777a74963c98afcdd7e (diff) | |
| download | linux-8e40dd932037d52e0c599f16057189b4756d2e5c.tar.xz | |
drm/amd/display: Revert "not disable dtb as dto src at dpms off"
[why]
not all the asic using the same code path.
need to revisit and limit the impact.
This reverts commit 32be4e39f459f3ac9c191569ae8e3731cb82f7ab.
Reviewed-by: Gabe Teeger <gabe.teeger@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 8 |
2 files changed, 5 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c index 6fe26094addd..23bec5d25ed6 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c @@ -1152,6 +1152,7 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx) const struct link_hwss *link_hwss = get_link_hwss(link, &pipe_ctx->link_res); struct dccg *dccg = dc->res_pool->dccg; struct timing_generator *tg = pipe_ctx->stream_res.tg; + struct dtbclk_dto_params dto_params = {0}; int dp_hpo_inst; struct link_encoder *link_enc = pipe_ctx->link_res.dio_link_enc; struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc; @@ -1178,10 +1179,14 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx) link_hwss->reset_stream_encoder(pipe_ctx); if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx) && dccg) { + dto_params.otg_inst = tg->inst; + dto_params.timing = &pipe_ctx->stream->timing; dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst; if (dccg) { dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst); dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst); + if (dccg && dccg->funcs->set_dtbclk_dto) + dccg->funcs->set_dtbclk_dto(dccg, &dto_params); } } else if (dccg && dccg->funcs->disable_symclk_se) { dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst, diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c index 959cd2fbb250..846c9c51f2d9 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c @@ -2806,8 +2806,6 @@ void dcn20_reset_back_end_for_pipe( { struct dc_link *link = pipe_ctx->stream->link; const struct link_hwss *link_hwss = get_link_hwss(link, &pipe_ctx->link_res); - struct dccg *dccg = dc->res_pool->dccg; - struct dtbclk_dto_params dto_params = {0}; DC_LOGGER_INIT(dc->ctx->logger); if (pipe_ctx->stream_res.stream_enc == NULL) { @@ -2868,12 +2866,6 @@ void dcn20_reset_back_end_for_pipe( &pipe_ctx->link_res, pipe_ctx->stream->signal); link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; } - if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx) && dccg) { - dto_params.otg_inst = pipe_ctx->stream_res.tg->inst; - dto_params.timing = &pipe_ctx->stream->timing; - if (dccg && dccg->funcs->set_dtbclk_dto) - dccg->funcs->set_dtbclk_dto(dccg, &dto_params); - } } /* |