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authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>2016-11-30 01:22:27 +0300
committerAlex Deucher <alexander.deucher@amd.com>2017-09-27 00:02:41 +0300
commit00d64d289fbba7f147b3a3a6fe88ca473ef6468d (patch)
treedc51ab3e6ed1f6e7f15ebab6b121751078cc001d /drivers/gpu/drm/amd/display/include/display_clock_interface.h
parent565968219c7a8feebd0b0b0b960563d9a3500ba5 (diff)
downloadlinux-00d64d289fbba7f147b3a3a6fe88ca473ef6468d.tar.xz
drm/amd/display: remove dead display clock code
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/include/display_clock_interface.h')
-rw-r--r--drivers/gpu/drm/amd/display/include/display_clock_interface.h85
1 files changed, 0 insertions, 85 deletions
diff --git a/drivers/gpu/drm/amd/display/include/display_clock_interface.h b/drivers/gpu/drm/amd/display/include/display_clock_interface.h
index 2006fa21f54c..ef519a284e0f 100644
--- a/drivers/gpu/drm/amd/display/include/display_clock_interface.h
+++ b/drivers/gpu/drm/amd/display/include/display_clock_interface.h
@@ -30,60 +30,6 @@
#include "grph_object_defs.h"
#include "signal_types.h"
-/* Timing related information*/
-struct dc_timing_params {
- uint32_t INTERLACED:1;
- uint32_t HCOUNT_BY_TWO:1;
- uint32_t PIXEL_REPETITION:4; /*< values 1 to 10 supported*/
- uint32_t PREFETCH:1;
-
- uint32_t h_total;
- uint32_t h_addressable;
- uint32_t h_sync_width;
-};
-
-/* Scaling related information*/
-struct dc_scaling_params {
- uint32_t h_overscan_right;
- uint32_t h_overscan_left;
- uint32_t h_taps;
- uint32_t v_taps;
-};
-
-/* VScalerEfficiency */
-enum v_scaler_efficiency {
- V_SCALER_EFFICIENCY_LB36BPP = 0,
- V_SCALER_EFFICIENCY_LB30BPP = 1,
- V_SCALER_EFFICIENCY_LB24BPP = 2,
- V_SCALER_EFFICIENCY_LB18BPP = 3
-};
-
-/* Parameters required for minimum Engine
- * and minimum Display clock calculations*/
-struct min_clock_params {
- uint32_t id;
- uint32_t requested_pixel_clock; /* in KHz */
- uint32_t actual_pixel_clock; /* in KHz */
- struct view source_view;
- struct view dest_view;
- struct dc_timing_params timing_info;
- struct dc_scaling_params scaling_info;
- enum signal_type signal_type;
- enum dc_color_depth deep_color_depth;
- enum v_scaler_efficiency scaler_efficiency;
- bool line_buffer_prefetch_enabled;
-};
-
-/* Result of Minimum System and Display clock calculations.
- * Minimum System clock and Display clock, source and path to be used
- * for Display clock*/
-struct minimum_clocks_calculation_result {
- uint32_t min_sclk_khz;
- uint32_t min_dclk_khz;
- uint32_t min_mclk_khz;
- uint32_t min_deep_sleep_sclk;
-};
-
/* Enumeration of all clocks states */
enum clocks_state {
CLOCKS_STATE_INVALID = 0,
@@ -110,10 +56,6 @@ struct state_dependent_clocks {
uint32_t pixel_clk_khz;
};
-struct display_clock_state {
- uint32_t DFS_BYPASS_ACTIVE:1;
-};
-
struct display_clock;
struct display_clock *dal_display_clock_dce112_create(
@@ -126,18 +68,9 @@ struct display_clock *dal_display_clock_dce80_create(
struct dc_context *ctx);
void dal_display_clock_destroy(struct display_clock **to_destroy);
-bool dal_display_clock_validate(
- struct display_clock *disp_clk,
- struct min_clock_params *params);
-uint32_t dal_display_clock_calculate_min_clock(
- struct display_clock *disp_clk,
- uint32_t path_num,
- struct min_clock_params *params);
-uint32_t dal_display_clock_get_validation_clock(struct display_clock *disp_clk);
void dal_display_clock_set_clock(
struct display_clock *disp_clk,
uint32_t requested_clock_khz);
-uint32_t dal_display_clock_get_clock(struct display_clock *disp_clk);
bool dal_display_clock_get_min_clocks_state(
struct display_clock *disp_clk,
enum clocks_state *clocks_state);
@@ -150,26 +83,8 @@ bool dal_display_clock_set_min_clocks_state(
enum clocks_state clocks_state);
uint32_t dal_display_clock_get_dp_ref_clk_frequency(
struct display_clock *disp_clk);
-/*the second parameter of "switchreferenceclock" is
- * a dummy argument for all pre dce 6.0 versions*/
-void dal_display_clock_switch_reference_clock(
- struct display_clock *disp_clk,
- bool use_external_ref_clk,
- uint32_t requested_clock_khz);
-void dal_display_clock_set_dp_ref_clock_source(
- struct display_clock *disp_clk,
- enum clock_source_id clk_src);
void dal_display_clock_store_max_clocks_state(
struct display_clock *disp_clk,
enum clocks_state max_clocks_state);
-void dal_display_clock_set_clock_state(
- struct display_clock *disp_clk,
- struct display_clock_state clk_state);
-struct display_clock_state dal_display_clock_get_clock_state(
- struct display_clock *disp_clk);
-uint32_t dal_display_clock_get_dfs_bypass_threshold(
- struct display_clock *disp_clk);
-void dal_display_clock_invalid_clock_state(
- struct display_clock *disp_clk);
#endif /* __DISPLAY_CLOCK_INTERFACE_H__ */