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| author | Zhan Liu <zhan.liu@amd.com> | 2021-09-25 10:01:48 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-10-04 22:22:57 +0300 |
| commit | 3f68c01be9a2227de1e190317fe34a6fb835a094 (patch) | |
| tree | da294c7baf14e182acf528fe663e1af4c5e113ed /drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.h | |
| parent | 0ad53fe3ae82443c74ff8cfd7bd13377cc1134a3 (diff) | |
| download | linux-3f68c01be9a2227de1e190317fe34a6fb835a094.tar.xz | |
drm/amd/display: add cyan_skillfish display support
[Why]
add display related cyan_skillfish files in.
makefile controlled by CONFIG_DRM_AMD_DC_DCN201 flag.
v2: squash in clang fixes from Harry, Nathan
v3: squash in missing CONFIG_DRM_AMD_DC check (Alex)
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Jun Lei <jun.lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.h new file mode 100644 index 000000000000..26cd62be6418 --- /dev/null +++ b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.h @@ -0,0 +1,46 @@ +/* + * Copyright 2021 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#ifndef __DC_HWSS_DCN201_H__ +#define __DC_HWSS_DCN201_H__ + +#include "hw_sequencer_private.h" + +void dcn201_set_dmdata_attributes(struct pipe_ctx *pipe_ctx); +void dcn201_init_hw(struct dc *dc); +void dcn201_unblank_stream(struct pipe_ctx *pipe_ctx, + struct dc_link_settings *link_settings); +void dcn201_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx); +void dcn201_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx); +void dcn201_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx); +void dcn201_set_cursor_attribute(struct pipe_ctx *pipe_ctx); +void dcn201_pipe_control_lock( + struct dc *dc, + struct pipe_ctx *pipe, + bool lock); +void dcn201_init_blank( + struct dc *dc, + struct timing_generator *tg); +#endif /* __DC_HWSS_DCN201_H__ */ |