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| author | Alexandre Demers <alexandre.f.demers@gmail.com> | 2025-04-07 08:52:30 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-04-08 23:48:14 +0300 |
| commit | 9cfb23021023f2e6c12fabe92bb666277843279f (patch) | |
| tree | 1c1a7eefc6e46c5c98739566c587ca46d53b146f /drivers/gpu/drm/amd/amdgpu/sid.h | |
| parent | b255b6488338abee61b1264469f679e7eb96292a (diff) | |
| download | linux-9cfb23021023f2e6c12fabe92bb666277843279f.tar.xz | |
drm/amdgpu: still cleanup sid.h
The defines, shifts and masks are already available in dce_6_0_d.h,
dce_6_0_sh_mask.h.
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/sid.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sid.h | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sid.h b/drivers/gpu/drm/amd/amdgpu/sid.h index cd7a531fb3a1..cbd4f8951cfa 100644 --- a/drivers/gpu/drm/amd/amdgpu/sid.h +++ b/drivers/gpu/drm/amd/amdgpu/sid.h @@ -81,11 +81,6 @@ #define MC_CG_ENABLE (1 << 18) #define MC_LS_ENABLE (1 << 19) -#define MC_SHARED_CHMAP 0x801 -#define NOOFCHAN_SHIFT 12 -#define NOOFCHAN_MASK 0x0000f000 -#define MC_SHARED_CHREMAP 0x802 - #define MC_VM_FB_LOCATION 0x809 #define MC_VM_AGP_TOP 0x80A #define MC_VM_AGP_BOT 0x80B @@ -664,17 +659,6 @@ #define CURSOR_WIDTH 64 #define CURSOR_HEIGHT 64 -#define AVIVO_D1VGA_CONTROL 0x00cc -# define AVIVO_DVGA_CONTROL_MODE_ENABLE (1 << 0) -# define AVIVO_DVGA_CONTROL_TIMING_SELECT (1 << 8) -# define AVIVO_DVGA_CONTROL_SYNC_POLARITY_SELECT (1 << 9) -# define AVIVO_DVGA_CONTROL_OVERSCAN_TIMING_SELECT (1 << 10) -# define AVIVO_DVGA_CONTROL_OVERSCAN_COLOR_EN (1 << 16) -# define AVIVO_DVGA_CONTROL_ROTATE (1 << 24) -#define AVIVO_D2VGA_CONTROL 0x00ce - -#define R600_BUS_CNTL 0x1508 -# define R600_BIOS_ROM_DIS (1 << 1) #define R600_ROM_CNTL 0x580 # define R600_SCK_OVERWRITE (1 << 1) |