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authorJack Xiao <Jack.Xiao@amd.com>2015-05-08 09:46:49 +0300
committerAlex Deucher <alexander.deucher@amd.com>2015-06-04 04:03:28 +0300
commit74a5d1656e165d5457be64b4d78d3259c2946e93 (patch)
tree968ada5f776dead7d0ec398443b84bcb2237f875 /drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
parent0147ee0f5921af606ac0f822107b69b53dd29358 (diff)
downloadlinux-74a5d1656e165d5457be64b4d78d3259c2946e93.tar.xz
drm/amdgpu: allow unaligned memory access (v2)
Set up the CP and SDMA for proper unaligned memory access. Required for OpenCL 2.x v2: udpate commit message Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index dd547c7f6cbc..d3eda315e719 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
@@ -36,6 +36,7 @@
#include "gmc/gmc_8_1_sh_mask.h"
#include "gca/gfx_8_0_d.h"
+#include "gca/gfx_8_0_enum.h"
#include "gca/gfx_8_0_sh_mask.h"
#include "bif/bif_5_0_d.h"
@@ -963,6 +964,8 @@ static void sdma_v3_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
unsigned vm_id, uint64_t pd_addr)
{
u32 srbm_gfx_cntl = 0;
+ u32 sh_mem_cfg = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE,
+ SH_MEM_ALIGNMENT_MODE_UNALIGNED);
amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |
SDMA_PKT_SRBM_WRITE_HEADER_BYTE_EN(0xf));
@@ -988,7 +991,7 @@ static void sdma_v3_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |
SDMA_PKT_SRBM_WRITE_HEADER_BYTE_EN(0xf));
amdgpu_ring_write(ring, mmSH_MEM_CONFIG);
- amdgpu_ring_write(ring, 0);
+ amdgpu_ring_write(ring, sh_mem_cfg);
amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |
SDMA_PKT_SRBM_WRITE_HEADER_BYTE_EN(0xf));