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authorChristian König <christian.koenig@amd.com>2018-11-02 17:00:16 +0300
committerAlex Deucher <alexander.deucher@amd.com>2019-03-19 23:04:04 +0300
commit516bc3d8dd7965f1a8a3ea453857f14d95971e62 (patch)
tree696e5c6b26edd2f222cb34670a3ea1f0c25b6460 /drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
parent59979bf8be1784ebfc44215031c6c88ca22ae65d (diff)
downloadlinux-516bc3d8dd7965f1a8a3ea453857f14d95971e62.tar.xz
drm/amdgpu: reroute VMC and UMD to IH ring 1
Page faults can easily overwhelm the interrupt handler. So to make sure that we never lose valuable interrupts on the primary ring we re-route page faults to IH ring 1. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
index f3a7d207af07..2f79765b4bdb 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
+++ b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
@@ -43,6 +43,7 @@ enum psp_gfx_crtl_cmd_id
GFX_CTRL_CMD_ID_ENABLE_INT = 0x00050000, /* enable PSP-to-Gfx interrupt */
GFX_CTRL_CMD_ID_DISABLE_INT = 0x00060000, /* disable PSP-to-Gfx interrupt */
GFX_CTRL_CMD_ID_MODE1_RST = 0x00070000, /* trigger the Mode 1 reset */
+ GFX_CTRL_CMD_ID_GBR_IH_SET = 0x00080000, /* set Gbr IH_RB_CNTL registers */
GFX_CTRL_CMD_ID_CONSUME_CMD = 0x000A0000, /* send interrupt to psp for updating write pointer of vf */
GFX_CTRL_CMD_ID_DESTROY_GPCOM_RING = 0x000C0000, /* destroy GPCOM ring */