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authorFelix Kuehling <Felix.Kuehling@amd.com>2021-11-04 23:15:43 +0300
committerAlex Deucher <alexander.deucher@amd.com>2021-11-24 23:02:25 +0300
commitd3a21f7e353dc8d6939383578f3bd45b4ae3a946 (patch)
treed1b51dbb2f03cc87075c74ea7360107d192dfda2 /drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
parent136057256686de39cc3a07c2e39ef6bc43003ff6 (diff)
downloadlinux-d3a21f7e353dc8d6939383578f3bd45b4ae3a946.tar.xz
drm/amdgpu: Fix MMIO HDP flush on SRIOV
Disable HDP register remapping on SRIOV and set rmmio_remap.reg_offset to the fixed address of the VF register for hdp_v*_flush_hdp. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Tested-by: Bokun Zhang <bokun.zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
index 0d2d629e2d6a..4bbacf1be25a 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
@@ -276,6 +276,10 @@ static void nbio_v6_1_init_registers(struct amdgpu_device *adev)
if (def != data)
WREG32_PCIE(smnPCIE_CI_CNTL, data);
+
+ if (amdgpu_sriov_vf(adev))
+ adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0,
+ mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2;
}
static void nbio_v6_1_program_ltr(struct amdgpu_device *adev)