summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
diff options
context:
space:
mode:
authorLijo Lazar <lijo.lazar@amd.com>2023-09-11 11:18:11 +0300
committerAlex Deucher <alexander.deucher@amd.com>2023-09-20 19:23:28 +0300
commit4e8303cf2c4dd27374a16a8881ec1a1cd5baf86f (patch)
tree1b95c903467e89eec1b8dacdc9f776a838bb3423 /drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
parentaddd7aef251cca374cef743824cc5ae230370bd0 (diff)
downloadlinux-4e8303cf2c4dd27374a16a8881ec1a1cd5baf86f.tar.xz
drm/amdgpu: Use function for IP version check
Use an inline function for version check. Gives more flexibility to handle any format changes. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index b6015157763a..59f10b353b3a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -132,7 +132,8 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
adev->mes.gfx_hqd_mask[i] = i ? 0 : 0xfffffffe;
for (i = 0; i < AMDGPU_MES_MAX_SDMA_PIPES; i++) {
- if (adev->ip_versions[SDMA0_HWIP][0] < IP_VERSION(6, 0, 0))
+ if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) <
+ IP_VERSION(6, 0, 0))
adev->mes.sdma_hqd_mask[i] = i ? 0 : 0x3fc;
/* zero sdma_hqd_mask for non-existent engine */
else if (adev->sdma.num_instances == 1)
@@ -1335,8 +1336,10 @@ int amdgpu_mes_self_test(struct amdgpu_device *adev)
for (i = 0; i < ARRAY_SIZE(queue_types); i++) {
/* On GFX v10.3, fw hasn't supported to map sdma queue. */
- if (adev->ip_versions[GC_HWIP][0] >= IP_VERSION(10, 3, 0) &&
- adev->ip_versions[GC_HWIP][0] < IP_VERSION(11, 0, 0) &&
+ if (amdgpu_ip_version(adev, GC_HWIP, 0) >=
+ IP_VERSION(10, 3, 0) &&
+ amdgpu_ip_version(adev, GC_HWIP, 0) <
+ IP_VERSION(11, 0, 0) &&
queue_types[i][0] == AMDGPU_RING_TYPE_SDMA)
continue;
@@ -1397,7 +1400,7 @@ int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe)
amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix,
sizeof(ucode_prefix));
- if (adev->ip_versions[GC_HWIP][0] >= IP_VERSION(11, 0, 0)) {
+ if (amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(11, 0, 0)) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mes%s.bin",
ucode_prefix,
pipe == AMDGPU_MES_SCHED_PIPE ? "_2" : "1");