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author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-05-12 00:56:58 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-05-12 00:56:58 +0300 |
commit | cc3c44c9fda264c6d401be04e95449a57c1231c6 (patch) | |
tree | aeb62c917a9be269c249d0c9828d9b680daa88ca /drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | |
parent | 849a4f09730ba3c02da01924c7a6e7a000a4d27c (diff) | |
parent | d8843eebbbd15b78c6a7745717b3705eca923b0f (diff) | |
download | linux-cc3c44c9fda264c6d401be04e95449a57c1231c6.tar.xz |
Merge tag 'drm-fixes-2023-05-12' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie:
"About the usual for this stage, bunch of amdgpu, a few i915 and a
scattering of fixes across the board"
dsc:
- macro fixes
simplefb:
- fix VESA format
scheduler:
- timeout handling fix
fbdev:
- avoid potential out-of-bounds access in generic fbdev emulation
ast:
- improve AST2500+ compat on ARM
mipi-dsi:
- small mipi-dsi fix
amdgpu:
- VCN3 fixes
- APUs always support PCI atomics
- legacy power management fixes
- DCN 3.1.4 fix
- DCFCLK fix
- fix several RAS irq refcount mismatches
- GPU Reset fix
- GFX 11.0.4 fix
i915:
- taint kernel when force_probe is used
- NULL deref and div-by-zero fixes for display
- GuC error capture fix for Xe devices"
* tag 'drm-fixes-2023-05-12' of git://anongit.freedesktop.org/drm/drm: (24 commits)
drm/amdgpu: change gfx 11.0.4 external_id range
drm/amdgpu/jpeg: Remove harvest checking for JPEG3
drm/amdgpu/gfx: disable gfx9 cp_ecc_error_irq only when enabling legacy gfx ras
drm/amd/pm: avoid potential UBSAN issue on legacy asics
drm/i915: taint kernel when force probing unsupported devices
drm/i915/dp: prevent potential div-by-zero
drm/i915: Fix NULL ptr deref by checking new_crtc_state
drm/i915/guc: Don't capture Gen8 regs on Xe devices
drm/amdgpu: disable sdma ecc irq only when sdma RAS is enabled in suspend
drm/amdgpu: Fix vram recover doesn't work after whole GPU reset (v2)
drm/amdgpu: drop gfx_v11_0_cp_ecc_error_irq_funcs
drm/amd/display: Enforce 60us prefetch for 200Mhz DCFCLK modes
drm/amd/display: Add symclk workaround during disable link output
drm/amd/pm: parse pp_handle under appropriate conditions
drm/amdgpu: set gfx9 onwards APU atomics support to be true
drm/amdgpu/nv: update VCN 3 max HEVC encoding resolution
drm/sched: Check scheduler work queue before calling timeout handling
drm/mipi-dsi: Set the fwnode for mipi_dsi_device
drm/nouveau/disp: More DP_RECEIVER_CAP_SIZE array fixes
drm/dsc: fix DP_DSC_MAX_BPP_DELTA_* macro values
...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_device.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 981a9cfb63b5..5c7d40873ee2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -3757,6 +3757,12 @@ int amdgpu_device_init(struct amdgpu_device *adev, adev->have_atomics_support = ((struct amd_sriov_msg_pf2vf_info *) adev->virt.fw_reserve.p_pf2vf)->pcie_atomic_ops_support_flags == (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | PCI_EXP_DEVCAP2_ATOMIC_COMP64); + /* APUs w/ gfx9 onwards doesn't reply on PCIe atomics, rather it is a + * internal path natively support atomics, set have_atomics_support to true. + */ + else if ((adev->flags & AMD_IS_APU) && + (adev->ip_versions[GC_HWIP][0] > IP_VERSION(9, 0, 0))) + adev->have_atomics_support = true; else adev->have_atomics_support = !pci_enable_atomic_ops_to_root(adev->pdev, @@ -4506,7 +4512,11 @@ static int amdgpu_device_recover_vram(struct amdgpu_device *adev) dev_info(adev->dev, "recover vram bo from shadow start\n"); mutex_lock(&adev->shadow_list_lock); list_for_each_entry(vmbo, &adev->shadow_list, shadow_list) { - shadow = &vmbo->bo; + /* If vm is compute context or adev is APU, shadow will be NULL */ + if (!vmbo->shadow) + continue; + shadow = vmbo->shadow; + /* No need to recover an evicted BO */ if (shadow->tbo.resource->mem_type != TTM_PL_TT || shadow->tbo.resource->start == AMDGPU_BO_INVALID_OFFSET || |