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| author | Abhishek Sahu <absahu@codeaurora.org> | 2017-12-13 17:25:38 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-12-22 03:03:34 +0300 |
| commit | 5736294aef83f89685ef0b5c5bc3acd90247723e (patch) | |
| tree | b60a3f3889deecdf6699e597648a2b9ed6ee7b03 /drivers/fpga/fpga-bridge.c | |
| parent | 9607f6224b3966652ce3f4e620c4694df190b64a (diff) | |
| download | linux-5736294aef83f89685ef0b5c5bc3acd90247723e.tar.xz | |
clk: qcom: ipq8074: add NSS clocks
IPQ8074 has NSS (Network Switching System) which has 2 UBI cores
and hardware crypto engine. Some clocks are separate for each UBI
core and remaining NSS clocks are common. The BIAS_PLL (300 Mhz)
and BIAS_PLL_NSS_NOC (416.5 Mhz) are external fixed clocks and
will be registered from dtsi or NSS driver.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
0 files changed, 0 insertions, 0 deletions