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authorClemens Ladisch <clemens@ladisch.de>2012-03-13 00:45:47 +0400
committerStefan Richter <stefanr@s5r6.in-berlin.de>2012-03-17 14:07:26 +0400
commit0c0efbacab8d70700d13301e0ae7975783c0cb0a (patch)
tree40d3dc3ccc449c8731239bb13505f0c2101ab000 /drivers/firewire
parentcfda62baa474b194802a555d3f7f2ccfa27e28bb (diff)
downloadlinux-0c0efbacab8d70700d13301e0ae7975783c0cb0a.tar.xz
firewire: ohci: fix too-early completion of IR multichannel buffers
handle_ir_buffer_fill() assumed that a completed descriptor would be indicated by a non-zero transfer_status (as in most other descriptors). However, this field is written by the controller as soon as (the end of) the first packet has been written into the buffer. As a consequence, if we happen to run into such a descriptor when the interrupt handler is executed after such a packet has completed, the descriptor would be taken out of the list of active descriptors as soon as the buffer had been partially filled, so the event for the buffer being completely filled would never be sent. To fix this, handle descriptors only when they have been completely filled, i.e., when res_count == 0. (This also matches the condition that is reported by the controller with an interrupt.) Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Cc: 2.6.36+ <stable@vger.kernel.org> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/firewire')
-rw-r--r--drivers/firewire/ohci.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index 384b5b08126c..e52615a14382 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -2751,7 +2751,7 @@ static int handle_ir_buffer_fill(struct context *context,
container_of(context, struct iso_context, context);
u32 buffer_dma;
- if (!last->transfer_status)
+ if (last->res_count != 0)
/* Descriptor(s) not done yet, stop iteration */
return 0;
@@ -2765,8 +2765,7 @@ static int handle_ir_buffer_fill(struct context *context,
if (le16_to_cpu(last->control) & DESCRIPTOR_IRQ_ALWAYS)
ctx->base.callback.mc(&ctx->base,
le32_to_cpu(last->data_address) +
- le16_to_cpu(last->req_count) -
- le16_to_cpu(last->res_count),
+ le16_to_cpu(last->req_count),
ctx->base.callback_data);
return 1;