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authorTony Lindgren <tony@atomide.com>2016-08-20 01:59:39 +0300
committerVinod Koul <vinod.koul@intel.com>2016-08-31 07:52:19 +0300
commit670fc2a87013c3733868094c3ea115250398f2ea (patch)
treef82ba57d6020f215aaf1a6160233ee8e6b0f303e /drivers/dma/cppi41.c
parent29b4817d4018df78086157ea3a55c1d9424a7cfc (diff)
downloadlinux-670fc2a87013c3733868094c3ea115250398f2ea.tar.xz
dmaengine: cppi41: Prepare to add PM runtime support
Let's just move code from cppi41_dma_issue_pending() to push_desc_queue() as that's the only call to push_desc_queue(). We want to do this for PM runtime as we need to call push_desc_queue() also for pending queued transfers from PM runtime resume. No functional changes, just moves code around. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/cppi41.c')
-rw-r--r--drivers/dma/cppi41.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/drivers/dma/cppi41.c b/drivers/dma/cppi41.c
index 4b2317426c8e..cf0415e5687b 100644
--- a/drivers/dma/cppi41.c
+++ b/drivers/dma/cppi41.c
@@ -386,21 +386,6 @@ static void push_desc_queue(struct cppi41_channel *c)
u32 desc_phys;
u32 reg;
- desc_phys = lower_32_bits(c->desc_phys);
- desc_num = (desc_phys - cdd->descs_phys) / sizeof(struct cppi41_desc);
- WARN_ON(cdd->chan_busy[desc_num]);
- cdd->chan_busy[desc_num] = c;
-
- reg = (sizeof(struct cppi41_desc) - 24) / 4;
- reg |= desc_phys;
- cppi_writel(reg, cdd->qmgr_mem + QMGR_QUEUE_D(c->q_num));
-}
-
-static void cppi41_dma_issue_pending(struct dma_chan *chan)
-{
- struct cppi41_channel *c = to_cpp41_chan(chan);
- u32 reg;
-
c->residue = 0;
reg = GCR_CHAN_ENABLE;
@@ -418,6 +403,21 @@ static void cppi41_dma_issue_pending(struct dma_chan *chan)
* before starting the dma engine.
*/
__iowmb();
+
+ desc_phys = lower_32_bits(c->desc_phys);
+ desc_num = (desc_phys - cdd->descs_phys) / sizeof(struct cppi41_desc);
+ WARN_ON(cdd->chan_busy[desc_num]);
+ cdd->chan_busy[desc_num] = c;
+
+ reg = (sizeof(struct cppi41_desc) - 24) / 4;
+ reg |= desc_phys;
+ cppi_writel(reg, cdd->qmgr_mem + QMGR_QUEUE_D(c->q_num));
+}
+
+static void cppi41_dma_issue_pending(struct dma_chan *chan)
+{
+ struct cppi41_channel *c = to_cpp41_chan(chan);
+
push_desc_queue(c);
}