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| author | Dan Williams <dan.j.williams@intel.com> | 2023-02-11 05:11:01 +0300 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-02-11 05:11:01 +0300 |
| commit | b8b9ffced017528bcdd262730ab10bc5084c3bb4 (patch) | |
| tree | 1edb4782acb2d6704f3847181a480f375214a40f /drivers/cxl/core/pci.c | |
| parent | dfd423e0a3256f88b8ea622fbbe04f91594195b6 (diff) | |
| parent | 09d09e04d2fcf88c4620dd28097e0e2a8f720eac (diff) | |
| download | linux-b8b9ffced017528bcdd262730ab10bc5084c3bb4.tar.xz | |
Merge branch 'for-6.3/cxl-ram-region' into cxl/next
Include the support for enumerating and provisioning ram regions for
v6.3. This also include a default policy change for ram / volatile
device-dax instances to assign them to the dax_kmem driver by default.
Diffstat (limited to 'drivers/cxl/core/pci.c')
| -rw-r--r-- | drivers/cxl/core/pci.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c index 184ead6a2796..2b463f107cb5 100644 --- a/drivers/cxl/core/pci.c +++ b/drivers/cxl/core/pci.c @@ -214,11 +214,6 @@ static int devm_cxl_enable_mem(struct device *host, struct cxl_dev_state *cxlds) return devm_add_action_or_reset(host, clear_mem_enable, cxlds); } -static bool range_contains(struct range *r1, struct range *r2) -{ - return r1->start <= r2->start && r1->end >= r2->end; -} - /* require dvsec ranges to be covered by a locked platform window */ static int dvsec_range_allowed(struct device *dev, void *arg) { |