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| author | Herbert Xu <herbert@gondor.apana.org.au> | 2023-03-11 12:09:10 +0300 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2023-03-17 06:16:44 +0300 |
| commit | 6bf6b6438fad0f1da5c4000f4a1e2fd81c05aa6b (patch) | |
| tree | 334d7b76215f78467320a34ede6701da59350728 /drivers/crypto/stm32 | |
| parent | 68629182cd54ad5cf8e501a95e2906c8eea0731c (diff) | |
| download | linux-6bf6b6438fad0f1da5c4000f4a1e2fd81c05aa6b.tar.xz | |
crypto: stm32 - Save 54 CSR registers
The CSR registers go from 0 to 53. So the number of registers
should be 54.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/stm32')
| -rw-r--r-- | drivers/crypto/stm32/stm32-hash.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index 7bf805563ac2..bde2b40a6a32 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -68,7 +68,7 @@ #define HASH_MASK_DATA_INPUT BIT(1) /* Context swap register */ -#define HASH_CSR_REGISTER_NUMBER 53 +#define HASH_CSR_REGISTER_NUMBER 54 /* Status Flags */ #define HASH_SR_DATA_INPUT_READY BIT(0) |