diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2021-07-04 05:40:30 +0300 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2021-08-06 04:52:11 +0300 |
commit | 05cc560c8cb4c2fe39022c1f397125470b28705c (patch) | |
tree | f11523301b0d05af26ccf35199b1791817227ed0 /drivers/clk/qcom/a53-pll.c | |
parent | 0dfe9bf91f9f2993ae73c603571a85e3c6e6fc24 (diff) | |
download | linux-05cc560c8cb4c2fe39022c1f397125470b28705c.tar.xz |
clk: qcom: a53pll/mux: Use unique clock name
Different from MSM8916 which has only one a53pll/mux clock, MSM8939 gets
three for Cluster0 (little cores), Cluster1 (big cores) and CCI (Cache
Coherent Interconnect). That said, a53pll/mux clock needs to be named
uniquely. Append @unit-address of device node to the clock name, so
that a53pll/mux will be named like below on MSM8939.
a53pll@b016000
a53pll@b116000
a53pll@b1d0000
a53mux@b1d1000
a53mux@b011000
a53mux@b111000
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210704024032.11559-3-shawn.guo@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/a53-pll.c')
-rw-r--r-- | drivers/clk/qcom/a53-pll.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c index d6756bd777ce..96a118be912d 100644 --- a/drivers/clk/qcom/a53-pll.c +++ b/drivers/clk/qcom/a53-pll.c @@ -37,6 +37,7 @@ static const struct regmap_config a53pll_regmap_config = { static int qcom_a53pll_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; struct regmap *regmap; struct resource *res; struct clk_pll *pll; @@ -66,7 +67,12 @@ static int qcom_a53pll_probe(struct platform_device *pdev) pll->status_bit = 16; pll->freq_tbl = a53pll_freq; - init.name = "a53pll"; + /* Use an unique name by appending @unit-address */ + init.name = devm_kasprintf(dev, GFP_KERNEL, "a53pll%s", + strchrnul(np->full_name, '@')); + if (!init.name) + return -ENOMEM; + init.parent_names = (const char *[]){ "xo" }; init.num_parents = 1; init.ops = &clk_pll_sr2_ops; |