diff options
| author | Marek Vasut <marex@denx.de> | 2024-11-12 04:37:35 +0300 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@linaro.org> | 2024-12-26 17:28:18 +0300 |
| commit | b7f67545ca9fa13f6e12debd68a92c1c664e2e3b (patch) | |
| tree | da59949009a723a16b25c749a0f6509f39dd72ea /drivers/clk/imx | |
| parent | a9b7c84d22fb1687d63ca2a386773015cf59436b (diff) | |
| download | linux-b7f67545ca9fa13f6e12debd68a92c1c664e2e3b.tar.xz | |
clk: imx: pll14xx: Add 208 MHz and 416 MHz entries for PLL1416x
The PLL1416x is used to implement SYS_PLL3 on i.MX8MP and can be used
to drive CLKOUTn clock. Add 208 MHz and 416 MHz entries to the PLL so
they can be generated by the PLL and used to produce e.g. 13 MHz or
26 MHz on CLKOUTn output.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20241112013805.333798-1-marex@denx.de
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Diffstat (limited to 'drivers/clk/imx')
| -rw-r--r-- | drivers/clk/imx/clk-pll14xx.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index d63564dbb12c..f290981ea13b 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -56,7 +56,9 @@ static const struct imx_pll14xx_rate_table imx_pll1416x_tbl[] = { PLL_1416X_RATE(700000000U, 350, 3, 2), PLL_1416X_RATE(640000000U, 320, 3, 2), PLL_1416X_RATE(600000000U, 300, 3, 2), + PLL_1416X_RATE(416000000U, 208, 3, 2), PLL_1416X_RATE(320000000U, 160, 3, 2), + PLL_1416X_RATE(208000000U, 208, 3, 3), }; static const struct imx_pll14xx_rate_table imx_pll1443x_tbl[] = { |