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| author | Stephen Boyd <sboyd@kernel.org> | 2019-08-14 19:45:43 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2019-08-14 19:45:43 +0300 |
| commit | 7c9dc000bd199f1f90c4e9f1b2814c0dd0ebaa2c (patch) | |
| tree | c54802e76532ea7e4d3a48f6f1a7a35f5f8975f8 /drivers/clk/clk.c | |
| parent | 5f9e832c137075045d15cd6899ab0505cfb2ca4b (diff) | |
| parent | 1d97657a4794ab23b47bd9921978ddd82569fcf4 (diff) | |
| download | linux-7c9dc000bd199f1f90c4e9f1b2814c0dd0ebaa2c.tar.xz | |
Merge tag 'clk-meson-v5.4-1' of https://github.com/BayLibre/clk-meson into clk-meson
Pull Amlogic clock changes from Jerome Brunet:
- Migrate to new clock description method
- Add DVFS support to g12
* tag 'clk-meson-v5.4-1' of https://github.com/BayLibre/clk-meson:
clk: meson: g12a: expose CPUB clock ID for G12B
clk: meson: g12a: add notifiers to handle cpu clock change
clk: meson: add g12a cpu dynamic divider driver
clk: core: introduce clk_hw_set_parent()
clk: meson: remove clk input helper
clk: meson: remove ee input bypass clocks
clk: meson: clk-regmap: migrate to new parent description method
clk: meson: meson8b: migrate to the new parent description method
clk: meson: axg: migrate to the new parent description method
clk: meson: gxbb: migrate to the new parent description method
clk: meson: g12a: migrate to the new parent description method
clk: meson: remove ao input bypass clocks
clk: meson: axg-aoclk: migrate to the new parent description method
clk: meson: gxbb-aoclk: migrate to the new parent description method
clk: meson: g12a-aoclk: migrate to the new parent description method
clk: meson: axg-audio: migrate to the new parent description method
clk: meson: g12a: fix hifi typo in mali parent_names
Diffstat (limited to 'drivers/clk/clk.c')
| -rw-r--r-- | drivers/clk/clk.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index c0990703ce54..c11b1781d24a 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -2487,6 +2487,12 @@ runtime_put: return ret; } +int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *parent) +{ + return clk_core_set_parent_nolock(hw->core, parent->core); +} +EXPORT_SYMBOL_GPL(clk_hw_set_parent); + /** * clk_set_parent - switch the parent of a mux clk * @clk: the mux clk whose input we are switching |
