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| author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2020-03-11 16:41:14 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-05-29 07:06:39 +0300 |
| commit | 423f042a65a2af82337af4e3c7f2cd828185e4f3 (patch) | |
| tree | 95d885366b94eed939670a5e2fa0599fe9ab8232 /drivers/clk/clk-fractional-divider.c | |
| parent | 907f9291f937463c27e5ca9cb5f1d8eedf9a2738 (diff) | |
| download | linux-423f042a65a2af82337af4e3c7f2cd828185e4f3.tar.xz | |
CLK: HSDK: CGU: support PLL bypassing
Support setting PLL to bypass mode to support output frequency
equal to input one.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Link: https://lkml.kernel.org/r/20200311134115.13257-3-Eugeniy.Paltsev@synopsys.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-fractional-divider.c')
0 files changed, 0 insertions, 0 deletions