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authorStephen Boyd <sboyd@kernel.org>2018-10-19 01:43:48 +0300
committerStephen Boyd <sboyd@kernel.org>2018-10-19 01:43:48 +0300
commit1fe7c040b61ebcc72a6b3c29136937f1b9191988 (patch)
tree1aa5bedfde1f86192b1203244e145eedb32a6fc3 /drivers/clk/at91/clk-pll.c
parentc1f74dbe59b74016adb8f96667fe27f135c5247f (diff)
parent5ddf0cdf9395b0f58ec863cefd497626c9ff0ad8 (diff)
parent0d09e668b70ba687ed07976a33a09b19e9416488 (diff)
parent4917fb90eec7c26dac1497ada3bd4a325f670fcc (diff)
parent62061d357c7f40dad558414895a182e70391513f (diff)
downloadlinux-1fe7c040b61ebcc72a6b3c29136937f1b9191988.tar.xz
Merge branches 'clk-actions-reset', 'clk-imx7-init-critical', 'clk-mmp2-ids' and 'clk-at91-pmc-rework' into clk-next
- Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs - Rework at91 PMC clock driver for new DT bindings * clk-actions-reset: clk: actions: Add Actions Semi S900 SoC Reset Management Unit support clk: actions: Add Actions Semi S700 SoC Reset Management Unit support clk: actions: Add Actions Semi Owl SoCs Reset Management Unit support dt-bindings: reset: Add binding constants for Actions Semi S900 RMU dt-bindings: reset: Add binding constants for Actions Semi S700 RMU dt-bindings: clock: Add reset controller bindings for Actions Semi Owl SoCs clk: actions: Cache regmap info in private clock descriptor * clk-imx7-init-critical: clk: imx7d: remove CLK_IS_CRITICAL flag for arm_a7_root_clk clk: imx: cpu clock should be always critical clk: imx: imx7d: remove clks_init_on array clk: imx: imx7d: remove unnecessary clocks from clks_init_on array * clk-mmp2-ids: clk: mmp2: fix the clock id for sdh2_clk and sdh3_clk * clk-at91-pmc-rework: clk: at91: move DT compatibility code to its own file clk: at91: add at91sam9rl PMC driver clk: at91: add at91sam9x5 PMCs driver clk: at91: add at91sam9260 PMC driver clk: at91: add sama5d2 PMC driver clk: at91: add sama5d4 pmc driver clk: at91: add new DT lookup function dt-bindings: clk: at91: Document new PMC binding clk: at91: add pmc_data struct and helpers clk: at91: allow clock registration from C code clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated() clk: at91: audio-pll: separate registration from DT parsing clk: at91: h32mx: separate registration from DT parsing clk: at91: generated: SSCs don't have a gclk clk: at91: audio-pll: fix audio pmc type