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authorLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-31 05:57:33 +0400
committerLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-31 18:26:23 +0400
commit25985edcedea6396277003854657b5f3cb31a628 (patch)
treef026e810210a2ee7290caeb737c23cb6472b7c38 /drivers/ata/ata_piix.c
parent6aba74f2791287ec407e0f92487a725a25908067 (diff)
downloadlinux-25985edcedea6396277003854657b5f3cb31a628.tar.xz
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'drivers/ata/ata_piix.c')
-rw-r--r--drivers/ata/ata_piix.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index cdec4ab3b159..0bc3fd6c3fdb 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -38,16 +38,16 @@
* Hardware documentation available at http://developer.intel.com/
*
* Documentation
- * Publically available from Intel web site. Errata documentation
- * is also publically available. As an aide to anyone hacking on this
+ * Publicly available from Intel web site. Errata documentation
+ * is also publicly available. As an aide to anyone hacking on this
* driver the list of errata that are relevant is below, going back to
* PIIX4. Older device documentation is now a bit tricky to find.
*
* The chipsets all follow very much the same design. The original Triton
- * series chipsets do _not_ support independant device timings, but this
+ * series chipsets do _not_ support independent device timings, but this
* is fixed in Triton II. With the odd mobile exception the chips then
* change little except in gaining more modes until SATA arrives. This
- * driver supports only the chips with independant timing (that is those
+ * driver supports only the chips with independent timing (that is those
* with SITRE and the 0x44 timing register). See pata_oldpiix and pata_mpiix
* for the early chip drivers.
*
@@ -122,7 +122,7 @@ enum {
P2 = 2, /* port 2 */
P3 = 3, /* port 3 */
IDE = -1, /* IDE */
- NA = -2, /* not avaliable */
+ NA = -2, /* not available */
RV = -3, /* reserved */
PIIX_AHCI_DEVICE = 6,