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| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2022-01-29 14:52:22 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2022-02-15 08:53:34 +0300 |
| commit | f14a58097eec1e7e52a769ff6cbbb8845c2f0781 (patch) | |
| tree | aba4d7896efcb25ec62a37d18caaafab956f1b19 /arch | |
| parent | 2e26d833c6d7f341b0d3038cb8b740fa5625fe88 (diff) | |
| download | linux-f14a58097eec1e7e52a769ff6cbbb8845c2f0781.tar.xz | |
ARM: dts: wpcm450: Add global control registers (GCR) node
The Global Control Registers (GCR) are a block of registers in Nuvoton
SoCs that expose misc functionality such as chip model and version
information or pinmux settings.
This patch adds a GCR node to nuvoton-wpcm450.dtsi in preparation for
enabling pinctrl on this SoC.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20220129115228.2257310-4-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi index d7cbeb187484..a17ee70085dd 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi @@ -33,6 +33,11 @@ interrupt-parent = <&aic>; ranges; + gcr: syscon@b0000000 { + compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd"; + reg = <0xb0000000 0x200>; + }; + serial0: serial@b8000000 { compatible = "nuvoton,wpcm450-uart"; reg = <0xb8000000 0x20>; |