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authorMurali Karicheri <m-karicheri2@ti.com>2016-06-09 02:06:43 +0300
committerSantosh Shilimkar <ssantosh@kernel.org>2016-06-09 02:06:43 +0300
commita9e5b20dd9e7e2b3cf742431d7eb446d0e9a6aa1 (patch)
treeb54788eb97e878443ca5c2fe0c983740ab3c31b4 /arch
parent59e13aac820cc1e3ca45778f1618070f6e0e0ae2 (diff)
downloadlinux-a9e5b20dd9e7e2b3cf742431d7eb446d0e9a6aa1.tar.xz
ARM: dts: keystone: add interrupt property to PCI controller bindings
Now that Keystone PCIe controller supports error interrupt handling add interrupt property to PCI controller DT bindings to enable error interrupt handling. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/keystone-k2e.dtsi2
-rw-r--r--arch/arm/boot/dts/keystone.dtsi2
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi
index 5374c9ae4fe6..9a51b8c88581 100644
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -104,6 +104,8 @@
num-lanes = <2>;
bus-range = <0x00 0xff>;
+ /* error interrupt */
+ interrupts = <GIC_SPI 385 IRQ_TYPE_EDGE_RISING>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index f627a1c06648..e23f46d15c80 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -302,6 +302,8 @@
num-lanes = <2>;
bus-range = <0x00 0xff>;
+ /* error interrupt */
+ interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */