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| author | Ondrej Jirman <megous@megous.com> | 2019-03-27 03:18:39 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-04-01 11:00:17 +0300 |
| commit | 86e2f89075ac0e4f99e051b9bc30b6ce9d0095b3 (patch) | |
| tree | d8fb6b97e548f4292a00ded048f64c4b1d709354 /arch | |
| parent | 2a63a027ea15ecc0e3a09817b0fe0b33547230fb (diff) | |
| download | linux-86e2f89075ac0e4f99e051b9bc30b6ce9d0095b3.tar.xz | |
ARM: dts: sun8i: a83t: Add nodes for UART2-UART4
A83T has 5 UART interfaces, but only the first two have their nodes
defined in sun8i-a83t.dtsi. Add nodes for the missing interfaces.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-a83t.dtsi | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index fcb7ef5ce2df..e5c39eef1c29 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -873,6 +873,39 @@ status = "disabled"; }; + uart2: serial@1c28800 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28800 0x400>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART2>; + resets = <&ccu RST_BUS_UART2>; + status = "disabled"; + }; + + uart3: serial@1c28c00 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c28c00 0x400>; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART3>; + resets = <&ccu RST_BUS_UART3>; + status = "disabled"; + }; + + uart4: serial@1c29000 { + compatible = "snps,dw-apb-uart"; + reg = <0x01c29000 0x400>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART4>; + resets = <&ccu RST_BUS_UART4>; + status = "disabled"; + }; + i2c0: i2c@1c2ac00 { compatible = "allwinner,sun8i-a83t-i2c", "allwinner,sun6i-a31-i2c"; |