diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-25 21:56:39 +0300 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-25 21:56:39 +0300 |
commit | 5596c6adb04d00cad445641a35f1f1745de57119 (patch) | |
tree | 00deda32f8e7606515c485f593de3daacfcc38c4 /arch | |
parent | 7c3dc440b1f5c75f45e24430f913e561dc82a419 (diff) | |
parent | 91dc288f4edf0d768e46c2c6d33e0ab703403459 (diff) | |
download | linux-5596c6adb04d00cad445641a35f1f1745de57119.tar.xz |
Merge tag 'mips_6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
"Just cleanups and fixes"
* tag 'mips_6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: vpe-mt: drop physical_memsize
mips: fix syscall_get_nr
MIPS: SMP-CPS: fix build error when HOTPLUG_CPU not set
MIPS: DTS: jz4780: add #clock-cells to rtc_dev
MIPS: dts: Boston: Fix dtc 'pci_device_reg' warning
mips: dts: ralink: mt7621: add port@5 as CPU port
mips: dts: align LED node names with dtschema
MIPS: ralink: Use devm_platform_get_and_ioremap_resource()
MIPS: pci-mt7620: Use devm_platform_get_and_ioremap_resource()
MIPS: pci: lantiq: Use devm_platform_get_and_ioremap_resource()
MIPS: lantiq: xway: Use devm_platform_get_and_ioremap_resource()
MIPS: BCM47XX: Add support for Linksys E2500 V3
mips: ralink: make SOC_MT7621 select PINCTRL_MT7621 and fix help section
MIPS: DTS: CI20: fix otg power gpio
MIPS: dts: lantiq: Remove bogus interrupt-parent; line
MIPS: Fix a compilation issue
MIPS: remove CONFIG_MIPS_LD_CAN_LINK_VDSO
mips: Realtek RTL: select NO_EXCEPT_FILL
MIPS: OCTEON: octeon-usb: Consolidate error messages
Diffstat (limited to 'arch')
35 files changed, 136 insertions, 144 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 15cb692b0a09..37072e15b263 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -445,6 +445,7 @@ config LANTIQ select IRQ_MIPS_CPU select CEVT_R4K select CSRC_R4K + select NO_EXCEPT_FILL select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_MIPS32_R2 select SYS_SUPPORTS_BIG_ENDIAN diff --git a/arch/mips/bcm47xx/board.c b/arch/mips/bcm47xx/board.c index 8ef002471b9c..90fb48b046c0 100644 --- a/arch/mips/bcm47xx/board.c +++ b/arch/mips/bcm47xx/board.c @@ -130,6 +130,7 @@ struct bcm47xx_board_type_list2 bcm47xx_board_list_boot_hw[] __initconst = { {{BCM47XX_BOARD_LINKSYS_E1000V21, "Linksys E1000 V2.1"}, "E1000", "2.1"}, {{BCM47XX_BOARD_LINKSYS_E1200V2, "Linksys E1200 V2"}, "E1200", "2.0"}, {{BCM47XX_BOARD_LINKSYS_E2000V1, "Linksys E2000 V1"}, "Linksys E2000", "1.0"}, + {{BCM47XX_BOARD_LINKSYS_E2500V3, "Linksys E2500 V3"}, "E2500", "1.0"}, /* like WRT610N v2.0 */ {{BCM47XX_BOARD_LINKSYS_E3000V1, "Linksys E3000 V1"}, "E300", "1.0"}, {{BCM47XX_BOARD_LINKSYS_E3200V1, "Linksys E3200 V1"}, "E3200", "1.0"}, diff --git a/arch/mips/bcm47xx/buttons.c b/arch/mips/bcm47xx/buttons.c index 38e4a9cbcf4e..437a737c01dd 100644 --- a/arch/mips/bcm47xx/buttons.c +++ b/arch/mips/bcm47xx/buttons.c @@ -223,6 +223,12 @@ bcm47xx_buttons_linksys_e2000v1[] __initconst = { }; static const struct gpio_keys_button +bcm47xx_buttons_linksys_e2500v3[] __initconst = { + BCM47XX_GPIO_KEY(9, KEY_WPS_BUTTON), + BCM47XX_GPIO_KEY(10, KEY_RESTART), +}; + +static const struct gpio_keys_button bcm47xx_buttons_linksys_e3000v1[] __initconst = { BCM47XX_GPIO_KEY(4, KEY_WPS_BUTTON), BCM47XX_GPIO_KEY(6, KEY_RESTART), @@ -617,6 +623,9 @@ int __init bcm47xx_buttons_register(void) case BCM47XX_BOARD_LINKSYS_E2000V1: err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_e2000v1); break; + case BCM47XX_BOARD_LINKSYS_E2500V3: + err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_e2500v3); + break; case BCM47XX_BOARD_LINKSYS_E3000V1: err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_e3000v1); break; diff --git a/arch/mips/boot/dts/cavium-octeon/dlink_dsr-1000n.dts b/arch/mips/boot/dts/cavium-octeon/dlink_dsr-1000n.dts index 2fdb4baad19c..cb460eaf8835 100644 --- a/arch/mips/boot/dts/cavium-octeon/dlink_dsr-1000n.dts +++ b/arch/mips/boot/dts/cavium-octeon/dlink_dsr-1000n.dts @@ -20,27 +20,27 @@ leds { compatible = "gpio-leds"; - usb1 { + led-usb1 { label = "usb1"; gpios = <&gpio 9 GPIO_ACTIVE_LOW>; }; - usb2 { + led-usb2 { label = "usb2"; gpios = <&gpio 10 GPIO_ACTIVE_LOW>; }; - wps { + led-wps { label = "wps"; gpios = <&gpio 11 GPIO_ACTIVE_LOW>; }; - wireless1 { + led-wireless1 { label = "5g"; gpios = <&gpio 17 GPIO_ACTIVE_LOW>; }; - wireless2 { + led-wireless2 { label = "2.4g"; gpios = <&gpio 18 GPIO_ACTIVE_LOW>; }; diff --git a/arch/mips/boot/dts/cavium-octeon/dlink_dsr-500n.dts b/arch/mips/boot/dts/cavium-octeon/dlink_dsr-500n.dts index e04237281b41..c55845fd84ca 100644 --- a/arch/mips/boot/dts/cavium-octeon/dlink_dsr-500n.dts +++ b/arch/mips/boot/dts/cavium-octeon/dlink_dsr-500n.dts @@ -21,15 +21,15 @@ leds { compatible = "gpio-leds"; - usb { + led-usb { gpios = <&gpio 9 GPIO_ACTIVE_LOW>; }; - wps { + led-wps { gpios = <&gpio 11 GPIO_ACTIVE_LOW>; }; - wireless { + led-wireless { label = "2.4g"; gpios = <&gpio 18 GPIO_ACTIVE_LOW>; }; diff --git a/arch/mips/boot/dts/img/boston.dts b/arch/mips/boot/dts/img/boston.dts index 84328afa3a55..72f7605d2e31 100644 --- a/arch/mips/boot/dts/img/boston.dts +++ b/arch/mips/boot/dts/img/boston.dts @@ -125,7 +125,7 @@ #interrupt-cells = <1>; }; - pci2_root@0,0,0 { + pci2_root@0,0 { compatible = "pci10ee,7021"; reg = <0x00000000 0 0 0 0>; diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index f38c39572a9e..239c4537484d 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -42,25 +42,25 @@ leds { compatible = "gpio-leds"; - led0 { + led-0 { label = "ci20:red:led0"; gpios = <&gpc 3 GPIO_ACTIVE_HIGH>; linux,default-trigger = "none"; }; - led1 { + led-1 { label = "ci20:red:led1"; gpios = <&gpc 2 GPIO_ACTIVE_HIGH>; linux,default-trigger = "nand-disk"; }; - led2 { + led-2 { label = "ci20:red:led2"; gpios = <&gpc 1 GPIO_ACTIVE_HIGH>; linux,default-trigger = "cpu1"; }; - led3 { + led-3 { label = "ci20:red:led3"; gpios = <&gpc 0 GPIO_ACTIVE_HIGH>; linux,default-trigger = "cpu0"; @@ -113,7 +113,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - gpio = <&gpf 14 GPIO_ACTIVE_LOW>; + gpio = <&gpf 15 GPIO_ACTIVE_LOW>; enable-active-high; }; }; diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index c182a656d63b..18affff85ce3 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -155,6 +155,8 @@ clocks = <&cgu JZ4780_CLK_RTCLK>; clock-names = "rtc"; + + #clock-cells = <0>; }; pinctrl: pin-controller@10010000 { diff --git a/arch/mips/boot/dts/lantiq/danube.dtsi b/arch/mips/boot/dts/lantiq/danube.dtsi index 510be63c8bdf..7a7ba66aa534 100644 --- a/arch/mips/boot/dts/lantiq/danube.dtsi +++ b/arch/mips/boot/dts/lantiq/danube.dtsi @@ -40,7 +40,6 @@ eiu0: eiu@101000 { #interrupt-cells = <1>; interrupt-controller; - interrupt-parent; compatible = "lantiq,eiu-xway"; reg = <0x101000 0x1000>; }; diff --git a/arch/mips/boot/dts/pic32/pic32mzda_sk.dts b/arch/mips/boot/dts/pic32/pic32mzda_sk.dts index ab70637bbec5..b1c5ffdb33fc 100644 --- a/arch/mips/boot/dts/pic32/pic32mzda_sk.dts +++ b/arch/mips/boot/dts/pic32/pic32mzda_sk.dts @@ -28,19 +28,19 @@ pinctrl-names = "default"; pinctrl-0 = <&user_leds_s0>; - led@1 { + led-1 { label = "pic32mzda_sk:red:led1"; gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; - led@2 { + led-2 { label = "pic32mzda_sk:yellow:led2"; gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc0"; }; - led@3 { + led-3 { label = "pic32mzda_sk:green:led3"; gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; default-state = "on"; diff --git a/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts b/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts index f3dff4009ab5..f894fe17816b 100644 --- a/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts +++ b/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts @@ -41,23 +41,23 @@ leds { compatible = "gpio-leds"; - led@0 { + led-0 { label = "tp-link:green:usb"; gpios = <&gpio 1 GPIO_ACTIVE_LOW>; }; - led@1 { + led-1 { label = "tp-link:green:system"; gpios = <&gpio 2 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; }; - led@2 { + led-2 { label = "tp-link:green:qss"; gpios = <&gpio 5 GPIO_ACTIVE_HIGH>; }; - led@3 { + led-3 { label = "tp-link:green:wlan"; gpios = <&gpio 9 GPIO_ACTIVE_LOW>; }; diff --git a/arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts b/arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts index 40e4c5da0e65..7affa58d4fa6 100644 --- a/arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts +++ b/arch/mips/boot/dts/qca/ar9331_dragino_ms14.dts @@ -22,25 +22,25 @@ leds { compatible = "gpio-leds"; - wlan { + led-wlan { label = "dragino2:red:wlan"; gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - lan { + led-lan { label = "dragino2:red:lan"; gpios = <&gpio 13 GPIO_ACTIVE_LOW>; default-state = "off"; }; - wan { + led-wan { label = "dragino2:red:wan"; gpios = <&gpio 17 GPIO_ACTIVE_LOW>; default-state = "off"; }; - system { + led-system { label = "dragino2:red:system"; gpios = <&gpio 28 GPIO_ACTIVE_HIGH>; default-state = "off"; diff --git a/arch/mips/boot/dts/qca/ar9331_omega.dts b/arch/mips/boot/dts/qca/ar9331_omega.dts index ed184d861d5f..8904aa917a6e 100644 --- a/arch/mips/boot/dts/qca/ar9331_omega.dts +++ b/arch/mips/boot/dts/qca/ar9331_omega.dts @@ -22,7 +22,7 @@ leds { compatible = "gpio-leds"; - system { + led-system { label = "onion:amber:system"; gpios = <&gpio 27 GPIO_ACTIVE_LOW>; default-state = "off"; diff --git a/arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts b/arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts index 5f424c2cd781..10b9759228b7 100644 --- a/arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts +++ b/arch/mips/boot/dts/qca/ar9331_tl_mr3020.dts @@ -22,25 +22,25 @@ leds { compatible = "gpio-leds"; - wlan { + led-wlan { label = "tp-link:green:wlan"; gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - lan { + led-lan { label = "tp-link:green:lan"; gpios = <&gpio 17 GPIO_ACTIVE_LOW>; default-state = "off"; }; - wps { + led-wps { label = "tp-link:green:wps"; gpios = <&gpio 26 GPIO_ACTIVE_LOW>; default-state = "off"; }; - led3g { + led-led3g { label = "tp-link:green:3g"; gpios = <&gpio 27 GPIO_ACTIVE_LOW>; default-state = "off"; diff --git a/arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts b/arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts index 179558161f85..18107ca0a06b 100644 --- a/arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts +++ b/arch/mips/boot/dts/ralink/gardena_smart_gateway_mt7688.dts @@ -47,67 +47,67 @@ * (see below). So we can't include it in this LED node. */ - power_blue { + led-power-blue { label = "smartgw:power:blue"; gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - power_green { + led-power-green { label = "smartgw:power:green"; gpios = <&gpio 19 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - power_red { + led-power-red { label = "smartgw:power:red"; gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - radio_blue { + led-radio-blue { label = "smartgw:radio:blue"; gpios = <&gpio 23 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - radio_green { + led-radio-green { label = "smartgw:radio:green"; gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - radio_red { + led-radio-red { label = "smartgw:radio:red"; gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - internet_blue { + led-internet-blue { label = "smartgw:internet:blue"; gpios = <&gpio 26 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - internet_green { + led-internet-green { label = "smartgw:internet:green"; gpios = <&gpio 27 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - internet_red { + led-internet-red { label = "smartgw:internet:red"; gpios = <&gpio 28 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - ethernet_link { + led-ethernet-link { label = "smartgw:eth:link"; gpios = <&gpio 3 GPIO_ACTIVE_LOW>; linux,default-trigger = "netdev"; }; - ethernet_activity { + led-ethernet-activity { label = "smartgw:eth:act"; gpios = <&gpio 43 GPIO_ACTIVE_LOW>; linux,default-trigger = "netdev"; diff --git a/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc1.dts b/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc1.dts index 0128bd8fa7ed..129b6710b699 100644 --- a/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc1.dts +++ b/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc1.dts @@ -33,13 +33,13 @@ gpio-leds { compatible = "gpio-leds"; - power { + led-power { label = "green:power"; gpios = <&gpio 6 GPIO_ACTIVE_LOW>; linux,default-trigger = "default-on"; }; - system { + led-system { label = "green:system"; gpios = <&gpio 8 GPIO_ACTIVE_LOW>; linux,default-trigger = "disk-activity"; @@ -91,22 +91,16 @@ status = "okay"; }; -&gmac1 { - status = "okay"; - phy-handle = <ðphy4>; -}; - -&mdio { - ethphy4: ethernet-phy@4 { - reg = <4>; - }; -}; - &switch0 { ports { port@0 { status = "okay"; label = "ethblack"; }; + + port@4 { + status = "okay"; + label = "ethblue"; + }; }; }; diff --git a/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts b/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts index e31417569e09..f810cd10f4f4 100644 --- a/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts +++ b/arch/mips/boot/dts/ralink/mt7621-gnubee-gb-pc2.dts @@ -33,33 +33,33 @@ gpio-leds { compatible = "gpio-leds"; - ethblack-green { + led-ethblack-green { label = "green:ethblack"; gpios = <&gpio 3 GPIO_ACTIVE_LOW>; }; - ethblue-green { + led-ethblue-green { label = "green:ethblue"; gpios = <&gpio 4 GPIO_ACTIVE_LOW>; }; - ethyellow-green { + led-ethyellow-green { label = "green:ethyellow"; gpios = <&gpio 15 GPIO_ACTIVE_LOW>; }; - ethyellow-orange { + led-ethyellow-orange { label = "orange:ethyellow"; gpios = <&gpio 13 GPIO_ACTIVE_LOW>; }; - power { + led-power { label = "green:power"; gpios = <&gpio 6 GPIO_ACTIVE_LOW>; linux,default-trigger = "default-on"; }; - system { + led-system { label = "green:system"; gpios = <&gpio 8 GPIO_ACTIVE_LOW>; linux,default-trigger = "disk-activity"; @@ -112,9 +112,12 @@ }; &gmac1 { - status = "okay"; phy-mode = "rgmii-rxid"; phy-handle = <ðphy5>; + + fixed-link { + status = "disabled"; + }; }; &mdio { @@ -134,5 +137,9 @@ status = "okay"; label = "ethblue"; }; + + port@5 { + status = "disabled"; + }; }; }; diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi index aec85c779359..290d47fbcfbb 100644 --- a/arch/mips/boot/dts/ralink/mt7621.dtsi +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi @@ -332,8 +332,13 @@ gmac1: mac@1 { compatible = "mediatek,eth-mac"; reg = <1>; - status = "disabled"; phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; }; mdio: mdio-bus { @@ -384,6 +389,18 @@ label = "swp4"; }; + port@5 { + reg = <5>; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + port@6 { reg = <6>; ethernet = <&gmac0>; diff --git a/arch/mips/cavium-octeon/octeon-usb.c b/arch/mips/cavium-octeon/octeon-usb.c index 5cffe1ed2447..28677c615175 100644 --- a/arch/mips/cavium-octeon/octeon-usb.c +++ b/arch/mips/cavium-octeon/octeon-usb.c @@ -245,7 +245,7 @@ static int dwc3_octeon_config_power(struct device *dev, u64 base) power_active_low = 0; gpio = gpio_pwr[1]; } else { - dev_err(dev, "dwc3 controller clock init failure.\n"); + dev_err(dev, "invalid power configuration\n"); return -EINVAL; } if ((OCTEON_IS_MODEL(OCTEON_CN73XX) || @@ -278,7 +278,7 @@ static int dwc3_octeon_config_power(struct device *dev, u64 base) uctl_host_cfg.s.ppc_en = 0; uctl_host_cfg.s.ppc_active_high_en = 0; cvmx_write_csr(base + UCTL_HOST_CFG, uctl_host_cfg.u64); - dev_warn(dev, "dwc3 controller clock init failure.\n"); + dev_info(dev, "power control disabled\n"); } return 0; } @@ -301,19 +301,19 @@ static int dwc3_octeon_clocks_start(struct device *dev, u64 base) i = of_property_read_u32(dev->of_node, "refclk-frequency", &clock_rate); if (i) { - pr_err("No UCTL \"refclk-frequency\"\n"); + dev_err(dev, "No UCTL \"refclk-frequency\"\n"); return -EINVAL; } i = of_property_read_string(dev->of_node, "refclk-type-ss", &ss_clock_type); if (i) { - pr_err("No UCTL \"refclk-type-ss\"\n"); + dev_err(dev, "No UCTL \"refclk-type-ss\"\n"); return -EINVAL; } i = of_property_read_string(dev->of_node, "refclk-type-hs", &hs_clock_type); if (i) { - pr_err("No UCTL \"refclk-type-hs\"\n"); + dev_err(dev, "No UCTL \"refclk-type-hs\"\n"); return -EINVAL; } if (strcmp("dlmc_ref_clk0", ss_clock_type) == 0) { @@ -322,29 +322,29 @@ static int dwc3_octeon_clocks_start(struct device *dev, u64 base) else if (strcmp(hs_clock_type, "pll_ref_clk") == 0) ref_clk_sel = 2; else - pr_err("Invalid HS clock type %s, using pll_ref_clk instead\n", - hs_clock_type); + dev_warn(dev, "Invalid HS clock type %s, using pll_ref_clk instead\n", + hs_clock_type); } else if (strcmp(ss_clock_type, "dlmc_ref_clk1") == 0) { if (strcmp(hs_clock_type, "dlmc_ref_clk1") == 0) ref_clk_sel = 1; else if (strcmp(hs_clock_type, "pll_ref_clk") == 0) ref_clk_sel = 3; else { - pr_err("Invalid HS clock type %s, using pll_ref_clk instead\n", - hs_clock_type); + dev_warn(dev, "Invalid HS clock type %s, using pll_ref_clk instead\n", + hs_clock_type); ref_clk_sel = 3; } } else - pr_err("Invalid SS clock type %s, using dlmc_ref_clk0 instead\n", - ss_clock_type); + dev_warn(dev, "Invalid SS clock type %s, using dlmc_ref_clk0 instead\n", + ss_clock_type); if ((ref_clk_sel == 0 || ref_clk_sel == 1) && - (clock_rate != 100000000)) - pr_err("Invalid UCTL clock rate of %u, using 100000000 instead\n", - clock_rate); + (clock_rate != 100000000)) + dev_warn(dev, "Invalid UCTL clock rate of %u, using 100000000 instead\n", + clock_rate); } else { - pr_err("No USB UCTL device node\n"); + dev_err(dev, "No USB UCTL device node\n"); return -EINVAL; } @@ -396,8 +396,8 @@ static int dwc3_octeon_clocks_start(struct device *dev, u64 base) uctl_ctl.s.ref_clk_div2 = 0; switch (clock_rate) { default: - dev_err(dev, "Invalid ref_clk %u, using 100000000 instead\n", - clock_rate); + dev_warn(dev, "Invalid ref_clk %u, using 100000000 instead\n", + clock_rate); fallthrough; case 100000000: mpll_mul = 0x19; @@ -438,10 +438,8 @@ static int dwc3_octeon_clocks_start(struct device *dev, u64 base) udelay(10); /* Steo 8c: Setup power-power control. */ - if (dwc3_octeon_config_power(dev, base)) { - dev_err(dev, "Error configuring power.\n"); + if (dwc3_octeon_config_power(dev, base)) return -EINVAL; - } /* Step 8d: Deassert UAHC reset signal. */ uctl_ctl.u64 = cvmx_read_csr(uctl_ctl_reg); @@ -529,10 +527,10 @@ static int __init dwc3_octeon_device_init(void) } mutex_lock(&dwc3_octeon_clocks_mutex); - dwc3_octeon_clocks_start(&pdev->dev, (u64)base); + if (dwc3_octeon_clocks_start(&pdev->dev, (u64)base) == 0) + dev_info(&pdev->dev, "clocks initialized.\n"); dwc3_octeon_set_endian_mode((u64)base); dwc3_octeon_phy_reset((u64)base); - dev_info(&pdev->dev, "clocks initialized.\n"); mutex_unlock(&dwc3_octeon_clocks_mutex); devm_iounmap(&pdev->dev, base); devm_release_mem_region(&pdev->dev, res->start, diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h index 30f4114ab872..3c401f11655e 100644 --- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h +++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h @@ -61,6 +61,7 @@ enum bcm47xx_board { BCM47XX_BOARD_LINKSYS_E1000V21, BCM47XX_BOARD_LINKSYS_E1200V2, BCM47XX_BOARD_LINKSYS_E2000V1, + BCM47XX_BOARD_LINKSYS_E2500V3, BCM47XX_BOARD_LINKSYS_E3000V1, BCM47XX_BOARD_LINKSYS_E3200V1, BCM47XX_BOARD_LINKSYS_E4200V1, diff --git a/arch/mips/include/asm/mach-rc32434/pci.h b/arch/mips/include/asm/mach-rc32434/pci.h index 9a6eefd12757..3eb767c8a4ee 100644 --- a/arch/mips/include/asm/mach-rc32434/pci.h +++ b/arch/mips/include/asm/mach-rc32434/pci.h @@ -374,7 +374,7 @@ struct pci_msu { PCI_CFG04_STAT_SSE | \ PCI_CFG04_STAT_PE) -#define KORINA_CNFG1 ((KORINA_STAT<<16)|KORINA_CMD) +#define KORINA_CNFG1 (KORINA_STAT | KORINA_CMD) #define KORINA_REVID 0 #define KORINA_CLASS_CODE 0 diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h index 25fa651c937d..ebdf4d910af2 100644 --- a/arch/mips/include/asm/syscall.h +++ b/arch/mips/include/asm/syscall.h @@ -38,7 +38,7 @@ static inline bool mips_syscall_is_indirect(struct task_struct *task, static inline long syscall_get_nr(struct task_struct *task, struct pt_regs *regs) { - return current_thread_info()->syscall; + return task_thread_info(task)->syscall; } static inline void mips_syscall_update_nr(struct task_struct *task, diff --git a/arch/mips/include/asm/vpe.h b/arch/mips/include/asm/vpe.h index baa949a744cb..ef7e07829607 100644 --- a/arch/mips/include/asm/vpe.h +++ b/arch/mips/include/asm/vpe.h @@ -102,7 +102,6 @@ struct vpe_control { struct list_head tc_list; /* Thread contexts */ }; -extern unsigned long physical_memsize; extern struct vpe_control vpecontrol; extern const struct file_operations vpe_fops; diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c index bcd6a944b839..f2df0cae1b4d 100644 --- a/arch/mips/kernel/smp-cps.c +++ b/arch/mips/kernel/smp-cps.c @@ -424,9 +424,11 @@ static void cps_shutdown_this_cpu(enum cpu_death death) wmb(); } } else { - pr_debug("Gating power to core %d\n", core); - /* Power down the core */ - cps_pm_enter_state(CPS_PM_POWER_GATED); + if (IS_ENABLED(CONFIG_HOTPLUG_CPU)) { + pr_debug("Gating power to core %d\n", core); + /* Power down the core */ + cps_pm_enter_state(CPS_PM_POWER_GATED); + } } } diff --git a/arch/mips/kernel/vpe-mt.c b/arch/mips/kernel/vpe-mt.c index 84a82b551ec3..223d6274f2e5 100644 --- a/arch/mips/kernel/vpe-mt.c +++ b/arch/mips/kernel/vpe-mt.c @@ -92,12 +92,11 @@ int vpe_run(struct vpe *v) write_tc_c0_tchalt(read_tc_c0_tchalt() & ~TCHALT_H); /* - * The sde-kit passes 'memsize' to __start in $a3, so set something - * here... Or set $a3 to zero and define DFLT_STACK_SIZE and - * DFLT_HEAP_SIZE when you compile your program + * We don't pass the memsize here, so VPE programs need to be + * compiled with DFLT_STACK_SIZE and DFLT_HEAP_SIZE defined. */ + mttgpr(7, 0); mttgpr(6, v->ntcs); - mttgpr(7, physical_memsize); /* set up VPE1 */ /* diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c index be4829cc7a3a..a3cf29365858 100644 --- a/arch/mips/lantiq/prom.c +++ b/arch/mips/lantiq/prom.c @@ -23,12 +23,6 @@ DEFINE_SPINLOCK(ebu_lock); EXPORT_SYMBOL_GPL(ebu_lock); /* - * This is needed by the VPE loader code, just set it to 0 and assume - * that the firmware hardcodes this value to something useful. - */ -unsigned long physical_memsize = 0L; - -/* * this struct is filled by the soc specific detection code and holds * information about the specific soc type, revision and name */ diff --git a/arch/mips/lantiq/xway/dcdc.c b/arch/mips/lantiq/xway/dcdc.c index 4960bee0a99d..96199966a350 100644 --- a/arch/mips/lantiq/xway/dcdc.c +++ b/arch/mips/lantiq/xway/dcdc.c @@ -22,10 +22,7 @@ static void __iomem *dcdc_membase; static int dcdc_probe(struct platform_device *pdev) { - struct resource *res; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - dcdc_membase = devm_ioremap_resource(&pdev->dev, res); + dcdc_membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); if (IS_ERR(dcdc_membase)) return PTR_ERR(dcdc_membase); diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c index f8eedeb15f18..934ac72937e5 100644 --- a/arch/mips/lantiq/xway/dma.c +++ b/arch/mips/lantiq/xway/dma.c @@ -239,12 +239,10 @@ static int ltq_dma_init(struct platform_device *pdev) { struct clk *clk; - struct resource *res; unsigned int id, nchannels; int i; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - ltq_dma_membase = devm_ioremap_resource(&pdev->dev, res); + ltq_dma_membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); if (IS_ERR(ltq_dma_membase)) panic("Failed to remap dma resource"); diff --git a/arch/mips/lantiq/xway/gptu.c b/arch/mips/lantiq/xway/gptu.c index 200fe9ff641d..a492b1eb1925 100644 --- a/arch/mips/lantiq/xway/gptu.c +++ b/arch/mips/lantiq/xway/gptu.c @@ -136,17 +136,14 @@ static inline void clkdev_add_gptu(struct device *dev, const char *con, static int gptu_probe(struct platform_device *pdev) { struct clk *clk; - struct resource *res; if (of_irq_to_resource_table(pdev->dev.of_node, irqres, 6) != 6) { dev_err(&pdev->dev, "Failed to get IRQ list\n"); return -EINVAL; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - /* remap gptu register range */ - gptu_membase = devm_ioremap_resource(&pdev->dev, res); + gptu_membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); if (IS_ERR(gptu_membase)) return PTR_ERR(gptu_membase); diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c index 8d16cd021f60..d967e4c0cf24 100644 --- a/arch/mips/pci/pci-lantiq.c +++ b/arch/mips/pci/pci-lantiq.c @@ -204,17 +204,13 @@ static int ltq_pci_startup(struct platform_device *pdev) static int ltq_pci_probe(struct platform_device *pdev) { - struct resource *res_cfg, *res_bridge; - pci_clear_flags(PCI_PROBE_ONLY); - res_bridge = platform_get_resource(pdev, IORESOURCE_MEM, 1); - ltq_pci_membase = devm_ioremap_resource(&pdev->dev, res_bridge); + ltq_pci_membase = devm_platform_get_and_ioremap_resource(pdev, 1, NULL); if (IS_ERR(ltq_pci_membase)) return PTR_ERR(ltq_pci_membase); - res_cfg = platform_get_resource(pdev, IORESOURCE_MEM, 0); - ltq_pci_mapped_cfg = devm_ioremap_resource(&pdev->dev, res_cfg); + ltq_pci_mapped_cfg = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); if (IS_ERR(ltq_pci_mapped_cfg)) return PTR_ERR(ltq_pci_mapped_cfg); diff --git a/arch/mips/pci/pci-mt7620.c b/arch/mips/pci/pci-mt7620.c index e032932348d6..2700d75d41c5 100644 --- a/arch/mips/pci/pci-mt7620.c +++ b/arch/mips/pci/pci-mt7620.c @@ -282,21 +282,17 @@ static int mt7628_pci_hw_init(struct platform_device *pdev) static int mt7620_pci_probe(struct platform_device *pdev) { - struct resource *bridge_res = platform_get_resource(pdev, - IORESOURCE_MEM, 0); - struct resource *pcie_res = platform_get_resource(pdev, - IORESOURCE_MEM, 1); u32 val = 0; rstpcie0 = devm_reset_control_get_exclusive(&pdev->dev, "pcie0"); if (IS_ERR(rstpcie0)) return PTR_ERR(rstpcie0); - bridge_base = devm_ioremap_resource(&pdev->dev, bridge_res); + bridge_base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); if (IS_ERR(bridge_base)) return PTR_ERR(bridge_base); - pcie_base = devm_ioremap_resource(&pdev->dev, pcie_res); + pcie_base = devm_platform_get_and_ioremap_resource(pdev, 1, NULL); if (IS_ERR(pcie_base)) return PTR_ERR(pcie_base); diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig index f9fe15630abb..06031796c87b 100644 --- a/arch/mips/ralink/Kconfig +++ b/arch/mips/ralink/Kconfig @@ -54,10 +54,11 @@ choice select HAVE_PCI select PCI_DRIVERS_GENERIC select SOC_BUS + select PINCTRL_MT7621 help - The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc dual-core CPU, - a 5-port 10/100/1000 switch/PHY and one RGMII. + The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc + dual-core CPU, a 5-port 10/100/1000 switch/PHY and one RGMII. endchoice choice diff --git a/arch/mips/ralink/timer.c b/arch/mips/ralink/timer.c index 652424d8ed51..fc503679a93d 100644 --- a/arch/mips/ralink/timer.c +++ b/arch/mips/ralink/timer.c @@ -95,7 +95,6 @@ static int rt_timer_enable(struct rt_timer *rt) static int rt_timer_probe(struct platform_device *pdev) { - struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); struct rt_timer *rt; struct clk *clk; @@ -109,7 +108,7 @@ static int rt_timer_probe(struct platform_device *pdev) if (rt->irq < 0) return rt->irq; - rt->membase = devm_ioremap_resource(&pdev->dev, res); + rt->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); if (IS_ERR(rt->membase)) return PTR_ERR(rt->membase); diff --git a/arch/mips/vdso/Kconfig b/arch/mips/vdso/Kconfig index a665f6108cb5..70140248da72 100644 --- a/arch/mips/vdso/Kconfig +++ b/arch/mips/vdso/Kconfig @@ -1,18 +1,6 @@ -# For the pre-R6 code in arch/mips/vdso/vdso.h for locating -# the base address of VDSO, the linker will emit a R_MIPS_PC32 -# relocation in binutils > 2.25 but it will fail with older versions -# because that relocation is not supported for that symbol. As a result -# of which we are forced to disable the VDSO symbols when building -# with < 2.25 binutils on pre-R6 kernels. For more references on why we -# can't use other methods to get the base address of VDSO please refer to -# the comments on that file. -# # GCC (at least up to version 9.2) appears to emit function calls that make use # of the GOT when targeting microMIPS, which we can't use in the VDSO due to # the lack of relocations. As such, we disable the VDSO for microMIPS builds. -config MIPS_LD_CAN_LINK_VDSO - def_bool LD_VERSION >= 22500 || LD_IS_LLD - config MIPS_DISABLE_VDSO - def_bool CPU_MICROMIPS || (!CPU_MIPSR6 && !MIPS_LD_CAN_LINK_VDSO) + def_bool CPU_MICROMIPS diff --git a/arch/mips/vdso/Makefile b/arch/mips/vdso/Makefile index 1f7d5c6c10b0..18af9474ed0e 100644 --- a/arch/mips/vdso/Makefile +++ b/arch/mips/vdso/Makefile @@ -52,9 +52,6 @@ endif CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) ifdef CONFIG_MIPS_DISABLE_VDSO - ifndef CONFIG_MIPS_LD_CAN_LINK_VDSO - $(warning MIPS VDSO requires binutils >= 2.25) - endif obj-vdso-y := $(filter-out vgettimeofday.o, $(obj-vdso-y)) endif |