diff options
author | Arnd Bergmann <arnd@arndb.de> | 2019-02-23 00:09:44 +0300 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2019-02-23 00:13:46 +0300 |
commit | 2547635054af399303f8b91292ea121e13b84bb1 (patch) | |
tree | 76ea6f1f03eda100a9ea4b41671634bf1a52859d /arch | |
parent | dc3e1ac12b0a8fd5db727a8f938726f63bc31950 (diff) | |
parent | dba235fa70cbedf7dd64d5763299451be4b9de16 (diff) | |
download | linux-2547635054af399303f8b91292ea121e13b84bb1.tar.xz |
Merge tag 'omap-for-v5.1/cpsw-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/late
One change to deprecate old CPSW Ethernet PHY mode selection driver
With the device tree changes configuring CPSW with a proper PHY driver,
we want to deprecate the old driver to avoid new users for it.
Note that this driver is based on the related dts changes.
* tag 'omap-for-v5.1/cpsw-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
net: ethernet: ti: cpsw: deprecate cpsw-phy-sel driver
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
26 files changed, 647 insertions, 90 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index bd40148a15b2..1ad9a6307b0a 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -719,6 +719,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \ am335x-cm-t335.dtb \ am335x-evm.dtb \ am335x-evmsk.dtb \ + am335x-guardian.dtb \ am335x-icev2.dtb \ am335x-lxm.dtb \ am335x-moxa-uc-2101.dtb \ diff --git a/arch/arm/boot/dts/am335x-baltos-ir2110.dts b/arch/arm/boot/dts/am335x-baltos-ir2110.dts index 75de1e723303..50dcf1290ac6 100644 --- a/arch/arm/boot/dts/am335x-baltos-ir2110.dts +++ b/arch/arm/boot/dts/am335x-baltos-ir2110.dts @@ -72,7 +72,3 @@ dual_emac_res_vlan = <2>; phy-handle = <&phy1>; }; - -&phy_sel { - rmii-clock-ext = <1>; -}; diff --git a/arch/arm/boot/dts/am335x-baltos-ir3220.dts b/arch/arm/boot/dts/am335x-baltos-ir3220.dts index 1b215c425c57..f3f1abd26470 100644 --- a/arch/arm/boot/dts/am335x-baltos-ir3220.dts +++ b/arch/arm/boot/dts/am335x-baltos-ir3220.dts @@ -114,7 +114,3 @@ dual_emac_res_vlan = <2>; phy-handle = <&phy1>; }; - -&phy_sel { - rmii-clock-ext = <1>; -}; diff --git a/arch/arm/boot/dts/am335x-baltos-ir5221.dts b/arch/arm/boot/dts/am335x-baltos-ir5221.dts index 832ead864dc5..42f473f0ed77 100644 --- a/arch/arm/boot/dts/am335x-baltos-ir5221.dts +++ b/arch/arm/boot/dts/am335x-baltos-ir5221.dts @@ -133,10 +133,6 @@ phy-handle = <&phy1>; }; -&phy_sel { - rmii-clock-ext = <1>; -}; - &dcan1 { pinctrl-names = "default"; pinctrl-0 = <&dcan1_pins>; diff --git a/arch/arm/boot/dts/am335x-chiliboard.dts b/arch/arm/boot/dts/am335x-chiliboard.dts index 9c2a947aacf5..bffa5dce54ec 100644 --- a/arch/arm/boot/dts/am335x-chiliboard.dts +++ b/arch/arm/boot/dts/am335x-chiliboard.dts @@ -14,6 +14,10 @@ compatible = "grinn,am335x-chiliboard", "grinn,am335x-chilisom", "ti,am33xx"; + chosen { + stdout-path = &uart0; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -151,10 +155,6 @@ phy-mode = "rmii"; }; -&phy_sel { - rmii-clock-ext; -}; - /* USB */ &usb { status = "okay"; diff --git a/arch/arm/boot/dts/am335x-guardian.dts b/arch/arm/boot/dts/am335x-guardian.dts new file mode 100644 index 000000000000..c9611ea4b884 --- /dev/null +++ b/arch/arm/boot/dts/am335x-guardian.dts @@ -0,0 +1,511 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Robert Bosch Power Tools GmbH + */ +/dts-v1/; + +#include "am33xx.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "Bosch AM335x Guardian"; + compatible = "bosch,am335x-guardian", "ti,am33xx"; + + chosen { + stdout-path = &uart0; + tick-timer = &timer2; + }; + + cpus { + cpu@0 { + cpu0-supply = <&dcdc2_reg>; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_pins>; + + button21 { + label = "guardian-power-button"; + linux,code = <KEY_POWER>; + gpios = <&gpio2 21 0>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_pins>; + + led1 { + label = "green:heartbeat"; + gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + + led2 { + label = "green:mmc0"; + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; + }; + + panel { + compatible = "ti,tilcdc,panel"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>; + pinctrl-1 = <&lcd_pins_sleep>; + + display-timings { + 320x240 { + hactive = <320>; + vactive = <240>; + hback-porch = <68>; + hfront-porch = <20>; + hsync-len = <1>; + vback-porch = <18>; + vfront-porch = <4>; + vsync-len = <1>; + clock-frequency = <9000000>; + hsync-active = <0>; + vsync-active = <0>; + }; + }; + panel-info { + ac-bias = <255>; + ac-bias-intrpt = <0>; + dma-burst-sz = <16>; + bpp = <24>; + bus-width = <16>; + fdd = <0x80>; + sync-edge = <0>; + sync-ctrl = <1>; + raster-order = <0>; + fifo-th = <0>; + }; + + }; + + pwm7: dmtimer-pwm { + compatible = "ti,omap-dmtimer-pwm"; + ti,timers = <&timer7>; + pinctrl-names = "default"; + pinctrl-0 = <&dmtimer7_pins>; + }; + + vmmcsd_fixed: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "vmmcsd_fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&cppi41dma { + status = "okay"; +}; + +&elm { + status = "okay"; +}; + +&gpmc { + pinctrl-names = "default"; + pinctrl-0 = <&nandflash_pins>; + ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */ + status = "okay"; + + nand@0,0 { + compatible = "ti,omap2-nand"; + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ + interrupt-parent = <&gpmc>; + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ + <1 IRQ_TYPE_NONE>; /* termcount */ + rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ + ti,nand-ecc-opt = "bch16"; + ti,elm-id = <&elm>; + nand-bus-width = <8>; + gpmc,device-width = <1>; + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <40>; + gpmc,oe-on-ns = <0>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + /* + * MTD partition table + * + * All SPL-* partitions are sized to minimal length which can + * be independently programmable. For NAND flash this is equal + * to size of erase-block. + */ + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SPL"; + reg = <0x0 0x40000>; + }; + + partition@1 { + label = "SPL.backup1"; + reg = <0x40000 0x40000>; + }; + + partition@2 { + label = "SPL.backup2"; + reg = <0x80000 0x40000>; + }; + + partition@3 { + label = "SPL.backup3"; + reg = <0xc0000 0x40000>; + }; + + partition@4 { + label = "u-boot"; + reg = <0x100000 0x100000>; + }; + + partition@5 { + label = "u-boot.backup1"; + reg = <0x200000 0x100000>; + }; + + partition@6 { + label = "u-boot-env"; + reg = <0x300000 0x40000>; + }; + + partition@7 { + label = "u-boot-env.backup1"; + reg = <0x340000 0x40000>; + }; + + partition@8 { + label = "UBI"; + reg = <0x380000 0x1fc80000>; + }; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + clock-frequency = <400000>; + status = "okay"; + + tps: tps@24 { + reg = <0x24>; + }; +}; + +&lcdc { + blue-and-red-wiring = "crossed"; + status = "okay"; +}; + +&mmc1 { + bus-width = <0x4>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; + vmmc-supply = <&vmmcsd_fixed>; + status = "okay"; +}; + +&rtc { + clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; + clock-names = "ext-clk", "int-clk"; + system-power-controller; +}; + +&spi0 { + ti,pindir-d0-out-d1-in; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + status = "okay"; +}; + +#include "tps65217.dtsi" + +&tps { + ti,pmic-shutdown-controller; + interrupt-parent = <&intc>; + interrupts = <7>; /* NMI */ + + backlight { + isel = <1>; /* 1 - ISET1, 2 ISET2 */ + fdim = <100>; /* TPS65217_BL_FDIM_100HZ */ + default-brightness = <100>; + }; + + regulators { + dcdc1_reg: regulator@0 { + regulator-name = "vdds_dpr"; + regulator-always-on; + }; + + dcdc2_reg: regulator@1 { + regulator-name = "vdd_mpu"; + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <1351500>; + regulator-boot-on; + regulator-always-on; + }; + + dcdc3_reg: regulator@2 { + regulator-name = "vdd_core"; + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <1150000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1_reg: regulator@3 { + regulator-name = "vio,vrtc,vdds"; + regulator-always-on; + }; + + ldo2_reg: regulator@4 { + regulator-name = "vdd_3v3aux"; + regulator-always-on; + }; + + ldo3_reg: regulator@5 { + regulator-name = "vdd_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo4_reg: regulator@6 { + regulator-name = "vdd_3v3a"; + regulator-always-on; + }; + }; +}; + +&tscadc { + status = "okay"; + + adc { + ti,adc-channels = <0 1 2 3 4 5 6>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&usb { + status = "okay"; +}; + +&usb_ctrl_mod { + status = "okay"; +}; + +&usb0 { + dr_mode = "peripheral"; + status = "okay"; +}; + +&usb0_phy { + status = "okay"; +}; + +&usb1 { + dr_mode = "host"; + status = "okay"; +}; + +&usb1_phy { + status = "okay"; +}; + +&am33xx_pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&clkout2_pin &gpio_pins>; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) + >; + }; + + dmtimer7_pins: pinmux_dmtimer7_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5) + >; + }; + + gpio_keys_pins: pinmux_gpio_keys_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7) + >; + }; + + gpio_pins: pinmux_gpio_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE7) + AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE7) + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) + AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) + >; + }; + + lcd_disen_pins: pinmux_lcd_disen_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7) + >; + }; + + lcd_pins_default: pinmux_lcd_pins_default { + pinctrl-single,pins = < + AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) + AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) + AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) + AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) + AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) + AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) + AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) + AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1) + AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0) + >; + }; + + lcd_pins_sleep: pinmux_lcd_pins_sleep { + pinctrl-single,pins = < + AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) + AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7) + >; + }; + + leds_pins: pinmux_leds_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7) + AM33XX_IOPAD(0x86c, PIN_OUTPUT | MUX_MODE7) + >; + }; + + mmc1_pins: pinmux_mmc1_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) + AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) + AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) + AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) + AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) + AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) + AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) + >; + }; + + spi0_pins: pinmux_spi0_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0) + AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0) + AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) + AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0) + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) + AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) + >; + }; + + nandflash_pins: pinmux_nandflash_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0) + AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0) + AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0) + AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0) + AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0) + AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0) + AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0) + AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0) + AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0) + AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0) + AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) + AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) + AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) + AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) + AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) + >; + }; +}; diff --git a/arch/arm/boot/dts/am335x-icev2.dts b/arch/arm/boot/dts/am335x-icev2.dts index f2005ecca74f..9ac775c71072 100644 --- a/arch/arm/boot/dts/am335x-icev2.dts +++ b/arch/arm/boot/dts/am335x-icev2.dts @@ -484,10 +484,6 @@ dual_emac; }; -&phy_sel { - rmii-clock-ext; -}; - &davinci_mdio { pinctrl-names = "default", "sleep"; pinctrl-0 = <&davinci_mdio_default>; diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi index 55b4c94cfafb..cbd22f25de95 100644 --- a/arch/arm/boot/dts/am335x-igep0033.dtsi +++ b/arch/arm/boot/dts/am335x-igep0033.dtsi @@ -123,10 +123,6 @@ phy-mode = "rmii"; }; -&phy_sel { - rmii-clock-ext; -}; - &elm { status = "okay"; }; diff --git a/arch/arm/boot/dts/am335x-lxm.dts b/arch/arm/boot/dts/am335x-lxm.dts index 481edcfaf121..d0e8e720a4d6 100644 --- a/arch/arm/boot/dts/am335x-lxm.dts +++ b/arch/arm/boot/dts/am335x-lxm.dts @@ -328,10 +328,6 @@ dual_emac_res_vlan = <3>; }; -&phy_sel { - rmii-clock-ext; -}; - &mac { pinctrl-names = "default", "sleep"; pinctrl-0 = <&cpsw_default>; diff --git a/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi b/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi index 14f781953475..cb5913a69837 100644 --- a/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi +++ b/arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi @@ -159,11 +159,6 @@ status = "okay"; }; -&phy_sel { - reg= <0x44e10650 0xf5>; - rmii-clock-ext; -}; - &sham { status = "okay"; }; diff --git a/arch/arm/boot/dts/am335x-moxa-uc-8100-me-t.dts b/arch/arm/boot/dts/am335x-moxa-uc-8100-me-t.dts index 5a58efc0c874..e562ce40f290 100644 --- a/arch/arm/boot/dts/am335x-moxa-uc-8100-me-t.dts +++ b/arch/arm/boot/dts/am335x-moxa-uc-8100-me-t.dts @@ -446,11 +446,6 @@ dual_emac_res_vlan = <2>; }; -&phy_sel { - reg= <0x44e10650 0xf5>; - rmii-clock-ext; -}; - &sham { status = "okay"; }; diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi index 428a25e952b0..015adb626b03 100644 --- a/arch/arm/boot/dts/am335x-phycore-som.dtsi +++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi @@ -100,10 +100,6 @@ status = "okay"; }; -&phy_sel { - rmii-clock-ext; -}; - /* I2C Busses */ &am33xx_pinmux { i2c0_pins: pinmux_i2c0 { diff --git a/arch/arm/boot/dts/am335x-shc.dts b/arch/arm/boot/dts/am335x-shc.dts index d0fd68873689..5cdaf0cd9401 100644 --- a/arch/arm/boot/dts/am335x-shc.dts +++ b/arch/arm/boot/dts/am335x-shc.dts @@ -1,11 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * support for the bosch am335x based shc c3 board * * Copyright, C) 2015 Heiko Schocher <hs@denx.de> * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ /dts-v1/; diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi index 7b818d9d2eab..f459ec316a22 100644 --- a/arch/arm/boot/dts/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/am33xx-l4.dtsi @@ -279,17 +279,9 @@ #pinctrl-cells = <1>; ranges = <0 0 0x2000>; - phy_sel: cpsw-phy-sel@650 { - compatible = "ti,am3352-cpsw-phy-sel"; - reg= <0x650 0x4>; - reg-names = "gmii-sel"; - }; - am33xx_pinmux: pinmux@800 { compatible = "pinctrl-single"; reg = <0x800 0x238>; - #address-cells = <1>; - #size-cells = <0>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0x7f>; @@ -302,6 +294,12 @@ #size-cells = <1>; ranges = <0 0 0x800>; + phy_gmii_sel: phy-gmii-sel { + compatible = "ti,am3352-phy-gmii-sel"; + reg = <0x650 0x4>; + #phy-cells = <2>; + }; + scm_clocks: clocks { #address-cells = <1>; #size-cells = <0>; @@ -717,7 +715,6 @@ interrupts = <40 41 42 43>; ranges = <0 0 0x8000>; syscon = <&scm_conf>; - cpsw-phy-sel = <&phy_sel>; status = "disabled"; davinci_mdio: mdio@1000 { @@ -733,11 +730,13 @@ cpsw_emac0: slave@200 { /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; + phys = <&phy_gmii_sel 1 1>; }; cpsw_emac1: slave@300 { /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; + phys = <&phy_gmii_sel 2 1>; }; }; }; diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts index f4a20cade808..4c6ee37ea573 100644 --- a/arch/arm/boot/dts/am437x-gp-evm.dts +++ b/arch/arm/boot/dts/am437x-gp-evm.dts @@ -71,7 +71,7 @@ pinctrl-0 = <&matrix_keypad_default>; pinctrl-1 = <&matrix_keypad_sleep>; - linux,wakeup; + wakeup-source; row-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH /* Bank0, pin3 */ &gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */ diff --git a/arch/arm/boot/dts/am437x-l4.dtsi b/arch/arm/boot/dts/am437x-l4.dtsi index ca0896f80248..85c6f4ff1824 100644 --- a/arch/arm/boot/dts/am437x-l4.dtsi +++ b/arch/arm/boot/dts/am437x-l4.dtsi @@ -280,12 +280,6 @@ #size-cells = <1>; ranges = <0 0 0x4000>; - phy_sel: cpsw-phy-sel@650 { - compatible = "ti,am43xx-cpsw-phy-sel"; - reg= <0x650 0x4>; - reg-names = "gmii-sel"; - }; - am43xx_pinmux: pinmux@800 { compatible = "ti,am437-padconf", "pinctrl-single"; @@ -300,11 +294,17 @@ }; scm_conf: scm_conf@0 { - compatible = "syscon"; + compatible = "syscon", "simple-bus"; reg = <0x0 0x800>; #address-cells = <1>; #size-cells = <1>; + phy_gmii_sel: phy-gmii-sel { + compatible = "ti,am43xx-phy-gmii-sel"; + reg = <0x650 0x4>; + #phy-cells = <2>; + }; + scm_clocks: clocks { #address-cells = <1>; #size-cells = <0>; @@ -555,7 +555,6 @@ cpts_clock_shift = <29>; ranges = <0 0 0x8000>; syscon = <&scm_conf>; - cpsw-phy-sel = <&phy_sel>; davinci_mdio: mdio@1000 { compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio"; @@ -572,11 +571,13 @@ cpsw_emac0: slave@200 { /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; + phys = <&phy_gmii_sel 1 0>; }; cpsw_emac1: slave@300 { /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; + phys = <&phy_gmii_sel 2 0>; }; }; }; diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts index 4ea753b3ee43..9dfd80e3b76e 100644 --- a/arch/arm/boot/dts/am43x-epos-evm.dts +++ b/arch/arm/boot/dts/am43x-epos-evm.dts @@ -584,10 +584,7 @@ &cpsw_emac0 { phy-handle = <ðphy0>; phy-mode = "rmii"; -}; - -&phy_sel { - rmii-clock-ext; + phys = <&phy_gmii_sel 1 1>; }; &i2c0 { diff --git a/arch/arm/boot/dts/dm814x.dtsi b/arch/arm/boot/dts/dm814x.dtsi index 601c57afd4fe..413ae19dd5f0 100644 --- a/arch/arm/boot/dts/dm814x.dtsi +++ b/arch/arm/boot/dts/dm814x.dtsi @@ -343,6 +343,12 @@ #size-cells = <1>; ranges = <0 0 0x800>; + phy_gmii_sel: phy-gmii-sel { + compatible = "ti,dm814-phy-gmii-sel"; + reg = <0x650 0x4>; + #phy-cells = <1>; + }; + scm_clocks: clocks { #address-cells = <1>; #size-cells = <0>; @@ -549,17 +555,14 @@ cpsw_emac0: slave@4a100200 { /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; + phys = <&phy_gmii_sel 1>; + }; cpsw_emac1: slave@4a100300 { /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; - }; - - phy_sel: cpsw-phy-sel@48140650 { - compatible = "ti,am3352-cpsw-phy-sel"; - reg= <0x48140650 0x4>; - reg-names = "gmii-sel"; + phys = <&phy_gmii_sel 2>; }; }; diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi index bb45cb7fc3b6..414f1cd68733 100644 --- a/arch/arm/boot/dts/dra7-l4.dtsi +++ b/arch/arm/boot/dts/dra7-l4.dtsi @@ -77,18 +77,18 @@ }; }; + phy_gmii_sel: phy-gmii-sel { + compatible = "ti,dra7xx-phy-gmii-sel"; + reg = <0x554 0x4>; + #phy-cells = <1>; + }; + scm_conf_clocks: clocks { #address-cells = <1>; #size-cells = <0>; }; }; - phy_sel: cpsw-phy-sel@554 { - compatible = "ti,dra7xx-cpsw-phy-sel"; - reg= <0x554 0x4>; - reg-names = "gmii-sel"; - }; - dra7_pmx_core: pinmux@1400 { compatible = "ti,dra7-padconf", "pinctrl-single"; @@ -3099,7 +3099,6 @@ <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>; ranges = <0 0 0x4000>; syscon = <&scm_conf>; - cpsw-phy-sel = <&phy_sel>; status = "disabled"; davinci_mdio: mdio@1000 { @@ -3114,11 +3113,13 @@ cpsw_emac0: slave@200 { /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; + phys = <&phy_gmii_sel 1>; }; cpsw_emac1: slave@300 { /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; + phys = <&phy_gmii_sel 2>; }; }; }; diff --git a/arch/arm/boot/dts/omap3-evm-common.dtsi b/arch/arm/boot/dts/omap3-evm-common.dtsi index 4c1227d1e79b..17c89df6ce6b 100644 --- a/arch/arm/boot/dts/omap3-evm-common.dtsi +++ b/arch/arm/boot/dts/omap3-evm-common.dtsi @@ -122,6 +122,7 @@ }; &mmc2 { + interrupts-extended = <&intc 86 &omap3_pmx_core 0x12e>; vmmc-supply = <&wl12xx_vmmc>; non-removable; bus-width = <4>; @@ -132,8 +133,10 @@ wlcore: wlcore@2 { compatible = "ti,wl1271"; reg = <2>; - interrupt-parent = <&gpio5>; - interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 149 */ + /* gpio_149 with uart1_rts pad as wakeirq */ + interrupts-extended = <&gpio5 21 IRQ_TYPE_EDGE_RISING>, + <&omap3_pmx_core 0x14e>; + interrupt-names = "irq", "wakeup"; ref-clock-frequency = <38400000>; }; }; diff --git a/arch/arm/boot/dts/omap3-evm-processor-common.dtsi b/arch/arm/boot/dts/omap3-evm-processor-common.dtsi index ce7f42f9448c..b4109f48ec18 100644 --- a/arch/arm/boot/dts/omap3-evm-processor-common.dtsi +++ b/arch/arm/boot/dts/omap3-evm-processor-common.dtsi @@ -86,6 +86,10 @@ OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ + OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */ + OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */ + OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */ + OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */ >; }; @@ -127,9 +131,13 @@ >; }; + /* + * Note that gpio_150 pulled high with internal pull to prevent wlcore + * reset on return from off mode in idle. + */ wl12xx_gpio: pinmux_wl12xx_gpio { pinctrl-single,pins = < - OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */ + OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_cts.gpio_150 */ OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */ >; }; diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index e53d32691308..2a8fcc09094d 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -32,6 +32,14 @@ display1 = &tv0; }; + ldo_3v3: fixedregulator { + compatible = "regulator-fixed"; + regulator-name = "ldo_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + /* fixed 26MHz oscillator */ hfclk_26m: oscillator { #clock-cells = <0>; @@ -116,6 +124,7 @@ spi-cpol; spi-cpha; + backlight= <&backlight>; label = "lcd"; port { lcd_in: endpoint { @@ -125,7 +134,7 @@ }; }; - backlight { + backlight: backlight { compatible = "pwm-backlight"; pwms = <&pwm11 0 12000000 0>; pwm-names = "backlight"; @@ -224,6 +233,15 @@ }; }; +&omap3_pmx_wkup { + gpio1_pins: pinmux_gpio1_pins { + pinctrl-single,pins = < + OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */ + OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_clkout.gpio_10 */ + >; + }; +}; + &omap3_pmx_core { pinctrl-names = "default"; pinctrl-0 = < @@ -312,6 +330,12 @@ >; }; + gps_pins: pinmux_gps_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* gpio145 */ + >; + }; + hdq_pins: hdq_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.hdq */ @@ -636,6 +660,11 @@ status = "disabled"; }; +&gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&gpio1_pins>; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; @@ -644,6 +673,14 @@ &uart2 { pinctrl-names = "default"; pinctrl-0 = <&uart2_pins>; + gnss: gnss { + compatible = "wi2wi,w2sg0004"; + pinctrl-names = "default"; + pinctrl-0 = <&gps_pins>; + sirf,onoff-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; + lna-supply = <&vsim>; + vcc-supply = <&ldo_3v3>; + }; }; &uart3 { diff --git a/arch/arm/boot/dts/omap3-gta04a5.dts b/arch/arm/boot/dts/omap3-gta04a5.dts index bd232b1b24cb..223b47ac596e 100644 --- a/arch/arm/boot/dts/omap3-gta04a5.dts +++ b/arch/arm/boot/dts/omap3-gta04a5.dts @@ -82,7 +82,7 @@ /* * for WL183x module see - * http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/net/wireless/ti,wlcore.txt + * Documentation/devicetree/bindings/net/wireless/ti,wlcore.txt */ &wifi_pwrseq { diff --git a/arch/arm/boot/dts/omap4-droid4-xt894.dts b/arch/arm/boot/dts/omap4-droid4-xt894.dts index 04758a2a87f0..838aa3445fbe 100644 --- a/arch/arm/boot/dts/omap4-droid4-xt894.dts +++ b/arch/arm/boot/dts/omap4-droid4-xt894.dts @@ -359,20 +359,24 @@ &mmc3 { vmmc-supply = <&wl12xx_vmmc>; + /* uart2_tx.sdmmc3_dat1 pad as wakeirq */ interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH &omap4_pmx_core 0xde>; - + interrupt-names = "irq", "wakeup"; non-removable; bus-width = <4>; cap-power-off-card; + keep-power-in-suspend; #address-cells = <1>; #size-cells = <0>; wlcore: wlcore@2 { compatible = "ti,wl1285", "ti,wl1283"; reg = <2>; - interrupt-parent = <&gpio4>; - interrupts = <4 IRQ_TYPE_EDGE_RISING>; /* gpio100 */ + /* gpio_100 with gpmc_wait2 pad as wakeirq */ + interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>, + <&omap4_pmx_core 0x4e>; + interrupt-names = "irq", "wakeup"; ref-clock-frequency = <26000000>; tcxo-clock-frequency = <26000000>; }; diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 27895c1604b9..926f018823a4 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -485,8 +485,10 @@ wlcore: wlcore@2 { compatible = "ti,wl1271"; reg = <2>; - interrupt-parent = <&gpio2>; - interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 53 */ + /* gpio_53 with gpmc_ncs3 pad as wakeup */ + interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_RISING>, + <&omap4_pmx_core 0x3a>; + interrupt-names = "irq", "wakeup"; ref-clock-frequency = <38400000>; }; }; diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index 9dc7ec7655cb..c88817bdcc56 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts @@ -26,6 +26,9 @@ }; vdd_eth: fixedregulator-vdd-eth { + pinctrl-names = "default"; + pinctrl-0 = <&enet_enable_gpio>; + compatible = "regulator-fixed"; regulator-name = "VDD_ETH"; regulator-min-microvolt = <3300000>; @@ -352,6 +355,29 @@ OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */ >; }; + + /* gpio_48 for ENET_ENABLE */ + enet_enable_gpio: pinmux_enet_enable_gpio { + pinctrl-single,pins = < + OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a24.gpio_48 */ + >; + }; + + ks8851_pins: pinmux_ks8851_pins { + pinctrl-single,pins = < + /* ENET_INT */ + OMAP4_IOPAD(0x054, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad10.gpio_34 */ + /* + * Misterious pin which makes the ethernet working + * The legacy board file requested this pin on boot + * (ETH_KS8851_QUART) and set it to high, similarly to + * the ENET_ENABLE pin. + * We could use gpio-hog to keep it high, but let's use + * it as a reset GPIO for ks8851. + */ + OMAP4_IOPAD(0x13a, PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.gpio_138 */ + >; + }; }; &i2c1 { @@ -452,12 +478,16 @@ pinctrl-0 = <&mcspi1_pins>; eth@0 { + pinctrl-names = "default"; + pinctrl-0 = <&ks8851_pins>; + compatible = "ks8851"; spi-max-frequency = <24000000>; reg = <0>; interrupt-parent = <&gpio2>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>; /* gpio line 34 */ vdd-supply = <&vdd_eth>; + reset-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>; }; }; |