diff options
| author | Peter Zijlstra <peterz@infradead.org> | 2023-08-07 15:38:07 +0300 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2023-08-09 22:51:06 +0300 |
| commit | 882cdb06b668488a42ef717a260c05ba7dc43a49 (patch) | |
| tree | 4d727488dd22489c176cac9a20b7032002f40d56 /arch/x86/events/msr.c | |
| parent | 62af03223785c11a0916df6a854ef4785d2350a5 (diff) | |
| download | linux-882cdb06b668488a42ef717a260c05ba7dc43a49.tar.xz | |
x86/cpu: Fix Gracemont uarch
Alderlake N is an E-core only product using Gracemont
micro-architecture. It fits the pre-existing naming scheme perfectly
fine, adhere to it.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20230807150405.686834933@infradead.org
Diffstat (limited to 'arch/x86/events/msr.c')
| -rw-r--r-- | arch/x86/events/msr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c index 61c59e0627d4..9e237b30f017 100644 --- a/arch/x86/events/msr.c +++ b/arch/x86/events/msr.c @@ -106,7 +106,7 @@ static bool test_intel(int idx, void *data) case INTEL_FAM6_ROCKETLAKE: case INTEL_FAM6_ALDERLAKE: case INTEL_FAM6_ALDERLAKE_L: - case INTEL_FAM6_ALDERLAKE_N: + case INTEL_FAM6_ATOM_GRACEMONT: case INTEL_FAM6_RAPTORLAKE: case INTEL_FAM6_RAPTORLAKE_P: case INTEL_FAM6_RAPTORLAKE_S: |