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authorIngo Molnar <mingo@kernel.org>2018-10-02 10:51:41 +0300
committerIngo Molnar <mingo@kernel.org>2018-10-02 10:51:41 +0300
commita4c9f26533eb547c8123e9a5f77517f61d19d2c2 (patch)
tree9767715779be7314ea86b1a83ae96f72e5ddb0da /arch/x86/events/core.c
parent97e831e13015045c098e1187f9b8b8e9bace9413 (diff)
parentdd45407c0b2445bc2aa0ecfea744d5af3a146577 (diff)
downloadlinux-a4c9f26533eb547c8123e9a5f77517f61d19d2c2.tar.xz
Merge branch 'x86/cache' into perf/core, to resolve conflicts
Avoid conflict with upcoming perf/core patches, merge in the RDT perf work. Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/events/core.c')
-rw-r--r--arch/x86/events/core.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 7a6fb9b2bec5..06b708494898 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -1033,6 +1033,27 @@ static inline void x86_assign_hw_event(struct perf_event *event,
}
}
+/**
+ * x86_perf_rdpmc_index - Return PMC counter used for event
+ * @event: the perf_event to which the PMC counter was assigned
+ *
+ * The counter assigned to this performance event may change if interrupts
+ * are enabled. This counter should thus never be used while interrupts are
+ * enabled. Before this function is used to obtain the assigned counter the
+ * event should be checked for validity using, for example,
+ * perf_event_read_local(), within the same interrupt disabled section in
+ * which this counter is planned to be used.
+ *
+ * Return: The index of the performance monitoring counter assigned to
+ * @perf_event.
+ */
+int x86_perf_rdpmc_index(struct perf_event *event)
+{
+ lockdep_assert_irqs_disabled();
+
+ return event->hw.event_base_rdpmc;
+}
+
static inline int match_prev_assignment(struct hw_perf_event *hwc,
struct cpu_hw_events *cpuc,
int i)