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authorMark Brown <broonie@kernel.org>2023-07-17 08:12:31 +0300
committerMark Brown <broonie@kernel.org>2023-07-17 08:12:31 +0300
commit0791faebfe750292a8a842b64795a390ca4a3b51 (patch)
tree0e6095a5a0130398b0693bddfdc421c41eebda7c /arch/x86/coco/core.c
parente8bf1741c14eb8e4a4e1364d45aeeab66660ab9b (diff)
parentfdf0eaf11452d72945af31804e2a1048ee1b574c (diff)
downloadlinux-0791faebfe750292a8a842b64795a390ca4a3b51.tar.xz
ASoC: Merge v6.5-rc2
Get a similar baseline to my other branches, and fixes for people using the branch.
Diffstat (limited to 'arch/x86/coco/core.c')
-rw-r--r--arch/x86/coco/core.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86/coco/core.c b/arch/x86/coco/core.c
index 73f83233d25d..eeec9986570e 100644
--- a/arch/x86/coco/core.c
+++ b/arch/x86/coco/core.c
@@ -13,10 +13,10 @@
#include <asm/coco.h>
#include <asm/processor.h>
-enum cc_vendor cc_vendor __ro_after_init;
+enum cc_vendor cc_vendor __ro_after_init = CC_VENDOR_NONE;
static u64 cc_mask __ro_after_init;
-static bool intel_cc_platform_has(enum cc_attr attr)
+static bool noinstr intel_cc_platform_has(enum cc_attr attr)
{
switch (attr) {
case CC_ATTR_GUEST_UNROLL_STRING_IO:
@@ -34,7 +34,7 @@ static bool intel_cc_platform_has(enum cc_attr attr)
* the other levels of SME/SEV functionality, including C-bit
* based SEV-SNP, are not enabled.
*/
-static __maybe_unused bool amd_cc_platform_vtom(enum cc_attr attr)
+static __maybe_unused __always_inline bool amd_cc_platform_vtom(enum cc_attr attr)
{
switch (attr) {
case CC_ATTR_GUEST_MEM_ENCRYPT:
@@ -58,7 +58,7 @@ static __maybe_unused bool amd_cc_platform_vtom(enum cc_attr attr)
* the trampoline area must be encrypted.
*/
-static bool amd_cc_platform_has(enum cc_attr attr)
+static bool noinstr amd_cc_platform_has(enum cc_attr attr)
{
#ifdef CONFIG_AMD_MEM_ENCRYPT
@@ -97,7 +97,7 @@ static bool amd_cc_platform_has(enum cc_attr attr)
#endif
}
-bool cc_platform_has(enum cc_attr attr)
+bool noinstr cc_platform_has(enum cc_attr attr)
{
switch (cc_vendor) {
case CC_VENDOR_AMD: