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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2022-07-29 20:10:30 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2022-07-29 20:10:30 +0300 |
| commit | a95eb1d086dcc579d52ca4c34742516f6434d1f2 (patch) | |
| tree | 10033fc1e634d94c7d98baf45d27952ff1fb9ee2 /arch/riscv | |
| parent | 9d928d9b78beec5d4b8afde9c144919b979685f2 (diff) | |
| parent | 45b53c9051770c0d9145083a328548745ee2e75b (diff) | |
| download | linux-a95eb1d086dcc579d52ca4c34742516f6434d1f2.tar.xz | |
Merge tag 'loongarch-fixes-5.19-5' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
Pull LoongArch fixes from Huacai Chen:
- Fix cache size calculation, stack protection attributes, ptrace's
fpr_set and "ROM Size" in boardinfo
- Some cleanups and improvements of assembly
- Some cleanups of unused code and useless code
* tag 'loongarch-fixes-5.19-5' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
LoongArch: Fix wrong "ROM Size" of boardinfo
LoongArch: Fix missing fcsr in ptrace's fpr_set
LoongArch: Fix shared cache size calculation
LoongArch: Disable executable stack by default
LoongArch: Remove unused variables
LoongArch: Remove clock setting during cpu hotplug stage
LoongArch: Remove useless header compiler.h
LoongArch: Remove several syntactic sugar macros for branches
LoongArch: Re-tab the assembly files
LoongArch: Simplify "BGT foo, zero" with BGTZ
LoongArch: Simplify "BLT foo, zero" with BLTZ
LoongArch: Simplify "BEQ/BNE foo, zero" with BEQZ/BNEZ
LoongArch: Use the "move" pseudo-instruction where applicable
LoongArch: Use the "jr" pseudo-instruction where applicable
LoongArch: Use ABI names of registers where appropriate
Diffstat (limited to 'arch/riscv')
0 files changed, 0 insertions, 0 deletions