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authorNathan Lynch <ntl@pobox.com>2007-08-10 01:43:28 +0400
committerPaul Mackerras <paulus@samba.org>2007-08-17 05:01:54 +0400
commit0f7f2fb85a67953acd6bf379681f22f5c83d4f60 (patch)
tree1e96f7ae260afdc3cd3c24901e6f03bdcdcb385c /arch/powerpc/platforms/powermac
parentb139f1fb0f1e4bfe06f2c88ba8c9a55d9513d871 (diff)
downloadlinux-0f7f2fb85a67953acd6bf379681f22f5c83d4f60.tar.xz
[POWERPC] Remove gratuitous reads from powermac pci config space methods
The powermac pci configuration space write methods read the written location immediately after the write is performed, presumably in order to flush the write. However, configuration space writes are not allowed to be posted, making these reads gratuitous. Furthermore, this behavior potentially causes us to violate the PCI PM spec when changing between e.g. D0 and D3 states, because a delay of up to 10ms may be required before the OS accesses configuration space after the write which initiates the transition. Remove the unnecessary reads from macrisc_write_config, u3_ht_write_config, and u4_pcie_write_config. Signed-off-by: Nathan Lynch <ntl@pobox.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/powermac')
-rw-r--r--arch/powerpc/platforms/powermac/pci.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index 69d67ff07004..ec49099830d5 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -209,15 +209,12 @@ static int macrisc_write_config(struct pci_bus *bus, unsigned int devfn,
switch (len) {
case 1:
out_8(addr, val);
- (void) in_8(addr);
break;
case 2:
out_le16(addr, val);
- (void) in_le16(addr);
break;
default:
out_le32(addr, val);
- (void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
@@ -440,15 +437,12 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
switch (len) {
case 1:
out_8(addr, val);
- (void) in_8(addr);
break;
case 2:
out_le16(addr, val);
- (void) in_le16(addr);
break;
default:
out_le32((u32 __iomem *)addr, val);
- (void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
@@ -545,15 +539,12 @@ static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
switch (len) {
case 1:
out_8(addr, val);
- (void) in_8(addr);
break;
case 2:
out_le16(addr, val);
- (void) in_le16(addr);
break;
default:
out_le32(addr, val);
- (void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;