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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2017-02-07 08:03:17 +0300 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-02-07 08:40:18 +0300 |
| commit | ab9bad0ead9ab179ace09988a3f1cfca122eb7c2 (patch) | |
| tree | c66b5330f182f5110969c05ffad9371a9991e360 /arch/powerpc/kvm/book3s_hv_builtin.c | |
| parent | 2337d207288f163e10bd8d4d7eeb0c1c75046a0c (diff) | |
| download | linux-ab9bad0ead9ab179ace09988a3f1cfca122eb7c2.tar.xz | |
powerpc/powernv: Remove separate entry for OPAL real mode calls
All entry points already read the MSR so they can easily do
the right thing.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kvm/book3s_hv_builtin.c')
| -rw-r--r-- | arch/powerpc/kvm/book3s_hv_builtin.c | 34 |
1 files changed, 9 insertions, 25 deletions
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c index fe08fea54b70..2f69fbc19bb0 100644 --- a/arch/powerpc/kvm/book3s_hv_builtin.c +++ b/arch/powerpc/kvm/book3s_hv_builtin.c @@ -29,11 +29,6 @@ #include <asm/opal.h> #include <asm/smp.h> -static bool in_realmode(void) -{ - return !(mfmsr() & MSR_IR); -} - #define KVM_CMA_CHUNK_ORDER 18 /* @@ -230,13 +225,10 @@ void kvmhv_rm_send_ipi(int cpu) /* Else poke the target with an IPI */ xics_phys = paca[cpu].kvm_hstate.xics_phys; - if (!in_realmode()) - opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); - else if (xics_phys) + if (xics_phys) rm_writeb(xics_phys + XICS_MFRR, IPI_PRIORITY); else - opal_rm_int_set_mfrr(get_hard_smp_processor_id(cpu), - IPI_PRIORITY); + opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); } /* @@ -419,10 +411,8 @@ static long kvmppc_read_one_intr(bool *again) /* Now read the interrupt from the ICP */ xics_phys = local_paca->kvm_hstate.xics_phys; rc = 0; - if (!in_realmode()) + if (!xics_phys) rc = opal_int_get_xirr(&xirr, false); - else if (!xics_phys) - rc = opal_rm_int_get_xirr(&xirr, false); else xirr = _lwzcix(xics_phys + XICS_XIRR); if (rc < 0) @@ -453,15 +443,12 @@ static long kvmppc_read_one_intr(bool *again) */ if (xisr == XICS_IPI) { rc = 0; - if (!in_realmode()) { - opal_int_set_mfrr(hard_smp_processor_id(), 0xff); - rc = opal_int_eoi(h_xirr); - } else if (xics_phys) { + if (xics_phys) { _stbcix(xics_phys + XICS_MFRR, 0xff); _stwcix(xics_phys + XICS_XIRR, xirr); } else { - opal_rm_int_set_mfrr(hard_smp_processor_id(), 0xff); - rc = opal_rm_int_eoi(h_xirr); + opal_int_set_mfrr(hard_smp_processor_id(), 0xff); + rc = opal_int_eoi(h_xirr); } /* If rc > 0, there is another interrupt pending */ *again = rc > 0; @@ -482,14 +469,11 @@ static long kvmppc_read_one_intr(bool *again) /* We raced with the host, * we need to resend that IPI, bummer */ - if (!in_realmode()) - opal_int_set_mfrr(hard_smp_processor_id(), - IPI_PRIORITY); - else if (xics_phys) + if (xics_phys) _stbcix(xics_phys + XICS_MFRR, IPI_PRIORITY); else - opal_rm_int_set_mfrr(hard_smp_processor_id(), - IPI_PRIORITY); + opal_int_set_mfrr(hard_smp_processor_id(), + IPI_PRIORITY); /* Let side effects complete */ smp_mb(); return 1; |