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authorMark Brown <broonie@kernel.org>2020-03-04 21:28:57 +0300
committerMark Brown <broonie@kernel.org>2020-03-04 21:28:57 +0300
commitcb71d8efd74c588fc68cce2180a4861091e8fe8a (patch)
tree2d7591ae4fe588e1a14e4d2d6101a54f5f27db40 /arch/powerpc/kernel/signal.c
parent4709d86ca3c8f845ff653690b0a97ad19dc5ba18 (diff)
parent50b62071deab48c1a69c471f9a7d0c8ff9ef23eb (diff)
downloadlinux-cb71d8efd74c588fc68cce2180a4861091e8fe8a.tar.xz
Merge series "Compatible string consolidation for NXP DSPI driver" from Vladimir Oltean <olteanv@gmail.com>:
This series makes room in the driver for differentiation between the controllers which currently operate in TCFQ mode. Most of these are actually capable of a lot more in terms of throughput. This is in preparation of a second series which will convert the remaining users of TCFQ mode altogether to XSPI mode with command cycling. Vladimir Oltean (6): doc: spi-fsl-dspi: Add specific compatibles for all Layerscape SoCs spi: spi-fsl-dspi: Use specific compatible strings for all SoC instantiations spi: spi-fsl-dspi: Parameterize the FIFO size and DMA buffer size spi: spi-fsl-dspi: LS2080A and LX2160A support XSPI mode spi: spi-fsl-dspi: Support SPI software timestamping in all non-DMA modes spi: spi-fsl-dspi: Convert the instantiations that support it to DMA .../devicetree/bindings/spi/spi-fsl-dspi.txt | 17 +- drivers/spi/spi-fsl-dspi.c | 162 +++++++++++++----- 2 files changed, 128 insertions(+), 51 deletions(-) -- 2.17.1
Diffstat (limited to 'arch/powerpc/kernel/signal.c')
-rw-r--r--arch/powerpc/kernel/signal.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index e6c30cee6abf..d215f9554553 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -200,14 +200,27 @@ unsigned long get_tm_stackpointer(struct task_struct *tsk)
* normal/non-checkpointed stack pointer.
*/
+ unsigned long ret = tsk->thread.regs->gpr[1];
+
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
BUG_ON(tsk != current);
if (MSR_TM_ACTIVE(tsk->thread.regs->msr)) {
+ preempt_disable();
tm_reclaim_current(TM_CAUSE_SIGNAL);
if (MSR_TM_TRANSACTIONAL(tsk->thread.regs->msr))
- return tsk->thread.ckpt_regs.gpr[1];
+ ret = tsk->thread.ckpt_regs.gpr[1];
+
+ /*
+ * If we treclaim, we must clear the current thread's TM bits
+ * before re-enabling preemption. Otherwise we might be
+ * preempted and have the live MSR[TS] changed behind our back
+ * (tm_recheckpoint_new_task() would recheckpoint). Besides, we
+ * enter the signal handler in non-transactional state.
+ */
+ tsk->thread.regs->msr &= ~MSR_TS_MASK;
+ preempt_enable();
}
#endif
- return tsk->thread.regs->gpr[1];
+ return ret;
}