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authorStephen Rothwell <sfr@canb.auug.org.au>2005-12-07 05:01:05 +0300
committerPaul Mackerras <paulus@samba.org>2006-01-09 06:52:07 +0300
commitd4e4b3520c4df46cf1d15a56379a6fa57e267b7d (patch)
tree653d5a87d58e37b6bf44b5a06eaffb8d62735065 /arch/powerpc/kernel/pci_64.c
parente07102db63d10d9f9d94d21dfdb1178e65154b9e (diff)
downloadlinux-d4e4b3520c4df46cf1d15a56379a6fa57e267b7d.tar.xz
[PATCH] powerpc: fix for "Update OF address parsers"
This allows iSeries to build again. It just moves pci_address_to_pio outside the #ifdef CONFIG_PPC_MULTIPLATFORM. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/pci_64.c')
-rw-r--r--arch/powerpc/kernel/pci_64.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 0988222741f0..4eb93fc1eef2 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -1181,20 +1181,6 @@ void phbs_remap_io(void)
remap_bus_range(hose->bus);
}
-unsigned int pci_address_to_pio(phys_addr_t address)
-{
- struct pci_controller *hose, *tmp;
-
- list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
- if (address >= hose->io_base_phys &&
- address < (hose->io_base_phys + hose->pci_io_size))
- return (unsigned int)hose->io_base_virt +
- (address - hose->io_base_phys);
- }
- return (unsigned int)-1;
-}
-EXPORT_SYMBOL_GPL(pci_address_to_pio);
-
static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
{
struct pci_controller *hose = pci_bus_to_host(dev->bus);
@@ -1337,6 +1323,20 @@ struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node)
#endif /* CONFIG_PPC_MULTIPLATFORM */
+unsigned int pci_address_to_pio(phys_addr_t address)
+{
+ struct pci_controller *hose, *tmp;
+
+ list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
+ if (address >= hose->io_base_phys &&
+ address < (hose->io_base_phys + hose->pci_io_size))
+ return (unsigned int)hose->io_base_virt +
+ (address - hose->io_base_phys);
+ }
+ return (unsigned int)-1;
+}
+EXPORT_SYMBOL_GPL(pci_address_to_pio);
+
#define IOBASE_BRIDGE_NUMBER 0
#define IOBASE_MEMORY 1