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authorLinus Torvalds <torvalds@linux-foundation.org>2009-06-20 04:40:40 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-20 04:40:40 +0400
commit773d7a09e1a1349a5319ac8665e9c612c6aa27d8 (patch)
tree3b2272bb3cfcab04ba6459cba116e577278c9392 /arch/powerpc/kernel/cpu_setup_fsl_booke.S
parent17fad5209e6b55148dbd20156cdaf2c7e67faa40 (diff)
parentb71a107c66ad952c9d35ec046a803efc89a80556 (diff)
downloadlinux-773d7a09e1a1349a5319ac8665e9c612c6aa27d8.tar.xz
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (35 commits) powerpc/5121: make clock debug output more readable powerpc/5xxx: Add common mpc5xxx_get_bus_frequency() function powerpc/5200: Update pcm030.dts to add i2c eeprom and delete cruft powerpc/5200: convert mpc52xx_psc_spi to use cs_control callback fbdev/xilinxfb: Fix improper casting and tighen up probe path usb/ps3: Add missing annotations powerpc: Add memory clobber to mtspr() powerpc: Fix invalid construct in our CPU selection Kconfig ps3rom: Use ps3_system_bus_[gs]et_drvdata() instead of direct access powerpc: Add configurable -Werror for arch/powerpc of_serial: Add UPF_FIXED_TYPE flag drivers/hvc: Add missing __devexit_p() net/ps3: gelic - Add missing annotations powerpc: Introduce macro spin_event_timeout() powerpc/warp: Fix ISA_DMA_THRESHOLD default powerpc/bootwrapper: Custom build options for XPedite52xx targets powerpc/85xx: Add defconfig for X-ES MPC85xx boards powerpc/85xx: Add dts files for X-ES MPC85xx boards powerpc/85xx: Add platform support for X-ES MPC85xx boards 83xx: add support for the kmeter1 board. ...
Diffstat (limited to 'arch/powerpc/kernel/cpu_setup_fsl_booke.S')
-rw-r--r--arch/powerpc/kernel/cpu_setup_fsl_booke.S49
1 files changed, 46 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index eb4b9adcedb4..0adb50ad8031 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -17,6 +17,40 @@
#include <asm/cputable.h>
#include <asm/ppc_asm.h>
+_GLOBAL(__e500_icache_setup)
+ mfspr r0, SPRN_L1CSR1
+ andi. r3, r0, L1CSR1_ICE
+ bnelr /* Already enabled */
+ oris r0, r0, L1CSR1_CPE@h
+ ori r0, r0, (L1CSR1_ICFI | L1CSR1_ICLFR | L1CSR1_ICE)
+ mtspr SPRN_L1CSR1, r0 /* Enable I-Cache */
+ isync
+ blr
+
+_GLOBAL(__e500_dcache_setup)
+ mfspr r0, SPRN_L1CSR0
+ andi. r3, r0, L1CSR0_DCE
+ bnelr /* Already enabled */
+ msync
+ isync
+ li r0, 0
+ mtspr SPRN_L1CSR0, r0 /* Disable */
+ msync
+ isync
+ li r0, (L1CSR0_DCFI | L1CSR0_CLFC)
+ mtspr SPRN_L1CSR0, r0 /* Invalidate */
+ isync
+1: mfspr r0, SPRN_L1CSR0
+ andi. r3, r0, L1CSR0_CLFC
+ bne+ 1b /* Wait for lock bits reset */
+ oris r0, r0, L1CSR0_CPE@h
+ ori r0, r0, L1CSR0_DCE
+ msync
+ isync
+ mtspr SPRN_L1CSR0, r0 /* Enable */
+ isync
+ blr
+
_GLOBAL(__setup_cpu_e200)
/* enable dedicated debug exception handling resources (Debug APU) */
mfspr r3,SPRN_HID0
@@ -25,7 +59,16 @@ _GLOBAL(__setup_cpu_e200)
b __setup_e200_ivors
_GLOBAL(__setup_cpu_e500v1)
_GLOBAL(__setup_cpu_e500v2)
- b __setup_e500_ivors
+ mflr r4
+ bl __e500_icache_setup
+ bl __e500_dcache_setup
+ bl __setup_e500_ivors
+ mtlr r4
+ blr
_GLOBAL(__setup_cpu_e500mc)
- b __setup_e500mc_ivors
-
+ mflr r4
+ bl __e500_icache_setup
+ bl __e500_dcache_setup
+ bl __setup_e500mc_ivors
+ mtlr r4
+ blr