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author | Thomas Gleixner <tglx@linutronix.de> | 2020-12-15 12:48:07 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2020-12-15 12:48:07 +0300 |
commit | 3c41e57a1e168d879e923c5583adeae47eec9f64 (patch) | |
tree | e6272012c4b766189be2821316a3d23d115f5195 /arch/parisc | |
parent | d14ce74f1fb376ccbbc0b05ded477ada51253729 (diff) | |
parent | 2f5fbc4305d07725bfebaedb09e57271315691ef (diff) | |
download | linux-3c41e57a1e168d879e923c5583adeae47eec9f64.tar.xz |
Merge tag 'irqchip-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates for 5.11 from Marc Zyngier:
- Preliminary support for managed interrupts on platform devices
- Correctly identify allocation of MSIs proxyied by another device
- Remove the fasteoi IPI flow which has been proved useless
- Generalise the Ocelot support to new SoCs
- Improve GICv4.1 vcpu entry, matching the corresponding KVM optimisation
- Work around spurious interrupts on Qualcomm PDC
- Random fixes and cleanups
Link: https://lore.kernel.org/r/20201212135626.1479884-1-maz@kernel.org
Diffstat (limited to 'arch/parisc')
-rw-r--r-- | arch/parisc/kernel/process.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/parisc/kernel/process.c b/arch/parisc/kernel/process.c index f196d96e2f9f..a92a23d6acd9 100644 --- a/arch/parisc/kernel/process.c +++ b/arch/parisc/kernel/process.c @@ -169,7 +169,7 @@ void __cpuidle arch_cpu_idle_dead(void) void __cpuidle arch_cpu_idle(void) { - local_irq_enable(); + raw_local_irq_enable(); /* nop on real hardware, qemu will idle sleep. */ asm volatile("or %%r10,%%r10,%%r10\n":::); |