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author | Bernd Schmidt <bernd.schmidt@analog.com> | 2007-07-12 12:25:29 +0400 |
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committer | Bryan Wu <bryan.wu@analog.com> | 2007-07-12 12:25:29 +0400 |
commit | 29440a2b4cd37e32dfe0fa60ef1665775b24dab1 (patch) | |
tree | 1b7bd1c1793feba0719f04de2eb68e418498e827 /arch/mips/mm/fault.c | |
parent | 474f1a667d4bd40b6dcacc6870b70f4d2ba4e155 (diff) | |
download | linux-29440a2b4cd37e32dfe0fa60ef1665775b24dab1.tar.xz |
Blackfin arch: Start untangling the CPLB handling code.
- Move cache initialization to C from assembly.
- Move anomaly workaround for writing [ID]MEM_CONTROL to assembly, so
that we don't have to mess around with .align directives in C source.
- Fix a bug where bfin_write_DMEM_CONTROL would write to IMEM_CONTROL
- Break out CPLB related code from kernel/setup.c into their own file.
- Don't define variables in header files, only declare them.
Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/mips/mm/fault.c')
0 files changed, 0 insertions, 0 deletions