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author | Ralf Baechle <ralf@linux-mips.org> | 2005-07-14 19:57:16 +0400 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 22:31:53 +0400 |
commit | e01402b115cccb6357f956649487aca2c6f7fbba (patch) | |
tree | 256e14f8d2762de98b992219b1a47e8f56b4b0da /arch/mips/kernel/genex.S | |
parent | 86071b637db7baf599df26fdf820dce2fc55ca9f (diff) | |
download | linux-e01402b115cccb6357f956649487aca2c6f7fbba.tar.xz |
More AP / SP bits for the 34K, the Malta bits and things. Still wants
a little polishing.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/genex.S')
-rw-r--r-- | arch/mips/kernel/genex.S | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index 349ec301168f..fd904d1e4190 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -148,6 +148,38 @@ NESTED(except_vec_ejtag_debug, 0, sp) __FINIT /* + * Vectored interrupt handler. + * This prototype is copied to ebase + n*IntCtl.VS and patched + * to invoke the handler + */ +NESTED(except_vec_vi, 0, sp) + SAVE_SOME + SAVE_AT + .set push + .set noreorder +EXPORT(except_vec_vi_lui) + lui v0, 0 /* Patched */ + j except_vec_vi_handler +EXPORT(except_vec_vi_ori) + ori v0, 0 /* Patched */ + .set pop + END(except_vec_vi) +EXPORT(except_vec_vi_end) + +/* + * Common Vectored Interrupt code + * Complete the register saves and invoke the handler which is passed in $v0 + */ +NESTED(except_vec_vi_handler, 0, sp) + SAVE_TEMP + SAVE_STATIC + CLI + move a0, sp + jalr v0 + j ret_from_irq + END(except_vec_vi_handler) + +/* * EJTAG debug exception handler. */ NESTED(ejtag_debug_handler, PT_SIZE, sp) |