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authorMatt Roper <matthew.d.roper@intel.com>2021-07-17 08:14:26 +0300
committerMatt Roper <matthew.d.roper@intel.com>2021-07-21 21:07:00 +0300
commit46b0d7091cb9702265007d0f472846b01c773872 (patch)
tree53b926554ec9eafe843e4f46622a12fc62a4ad5f /arch/m68k
parentefa894a50296ae1e07983eebd2c4ebc2b4d17a1a (diff)
downloadlinux-46b0d7091cb9702265007d0f472846b01c773872.tar.xz
drm/i915: Make display workaround upper bounds exclusive
Workarounds are documented in the bspec with an exclusive upper bound (i.e., a "fixed" stepping that no longer needs the workaround). This makes our driver's use of an inclusive upper bound for stepping ranges confusing; the differing notation between code and bspec makes it very easy for mistakes to creep in. Let's switch the upper bound of our IS_{GT,DISP}_STEP macros over to use an exclusive upper bound like the bspec does. This also has the benefit of helping make sure workarounds are properly handled for new minor steppings that show up (e.g., an A1 between the A0 and B0 we already knew about) --- if the new intermediate stepping pulls in hardware fixes early, there will be an update to the workaround definition which lets us know we need to change our code. If the new stepping does not pull a hardware fix earlier, then the new stepping will already be captured properly by the "[begin, fix)" range in the code. We'll probably need to be extra vigilant in code review of new workarounds for the near future to make sure developers notice the new semantics of workaround bounds. But we just migrated a bunch of our platforms from the IS_REVID bounds over to IS_{GT,DISP}_STEP, so people are already adjusting to the new macros and now is a good time to make this change too. [mattrope: Split out display changes to apply through intel-next tree] Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210717051426.4120328-8-matthew.d.roper@intel.com
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