diff options
| author | Ingo Molnar <mingo@kernel.org> | 2012-03-26 19:18:44 +0400 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2012-03-26 19:19:03 +0400 |
| commit | 7fd52392c56361a40f0c630a82b36b95ca31eac6 (patch) | |
| tree | 14091de24c6b28ea4cae9826f98aeedb7be091f5 /arch/m68k/include/asm/m532xsim.h | |
| parent | b01c3a0010aabadf745f3e7fdb9cab682e0a28a2 (diff) | |
| parent | e22057c8599373e5caef0bc42bdb95d2a361ab0d (diff) | |
| download | linux-7fd52392c56361a40f0c630a82b36b95ca31eac6.tar.xz | |
Merge branch 'linus' into perf/urgent
Merge reason: we need to fix a non-trivial merge conflict.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/m68k/include/asm/m532xsim.h')
| -rw-r--r-- | arch/m68k/include/asm/m532xsim.h | 35 |
1 files changed, 32 insertions, 3 deletions
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index ba4cc784f574..29b66e21413a 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h @@ -24,6 +24,19 @@ #define MCFINT_UART1 27 /* Interrupt number for UART1 */ #define MCFINT_UART2 28 /* Interrupt number for UART2 */ #define MCFINT_QSPI 31 /* Interrupt number for QSPI */ +#define MCFINT_FECRX0 36 /* Interrupt number for FEC */ +#define MCFINT_FECTX0 40 /* Interrupt number for FEC */ +#define MCFINT_FECENTC0 42 /* Interrupt number for FEC */ + +#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) +#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) +#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) + +#define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0) +#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0) +#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) + +#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI) #define MCF_WTM_WCR MCF_REG16(0xFC098000) @@ -82,9 +95,25 @@ /* * UART module. */ -#define MCFUART_BASE1 0xFC060000 /* Base address of UART1 */ -#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */ -#define MCFUART_BASE3 0xFC068000 /* Base address of UART3 */ +#define MCFUART_BASE0 0xFC060000 /* Base address of UART1 */ +#define MCFUART_BASE1 0xFC064000 /* Base address of UART2 */ +#define MCFUART_BASE2 0xFC068000 /* Base address of UART3 */ + +/* + * FEC module. + */ +#define MCFFEC_BASE0 0xFC030000 /* Base address of FEC0 */ +#define MCFFEC_SIZE0 0x800 /* Size of FEC0 region */ + +/* + * QSPI module. + */ +#define MCFQSPI_BASE 0xFC058000 /* Base address of QSPI */ +#define MCFQSPI_SIZE 0x40 /* Size of QSPI region */ + +#define MCFQSPI_CS0 84 +#define MCFQSPI_CS1 85 +#define MCFQSPI_CS2 86 /* * Timer module. |