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authorChen, Kenneth W <kenneth.w.chen@intel.com>2005-09-07 12:00:37 +0400
committerTony Luck <tony.luck@intel.com>2005-09-08 00:56:23 +0400
commit02326223247c773bc007629d54622d750c0371c1 (patch)
treedebb5e8b570310f150cfd5e6504c814b584d159f /arch/ia64/kernel/entry.S
parent295bd89279aad6959f0d363ee8e946d4766f9ad8 (diff)
downloadlinux-02326223247c773bc007629d54622d750c0371c1.tar.xz
[IA64] minor performance tune-up in ia64_switch_to
The reenabling of psr.ic should really belong to dtr mapping code block. It make the fall through code fast since it doesn't need to execute the predicated-off instruction. Logically make more sense as well since psr.ic was turned off in .map code block. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/kernel/entry.S')
-rw-r--r--arch/ia64/kernel/entry.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S
index 9be53e1ea404..3c8821024509 100644
--- a/arch/ia64/kernel/entry.S
+++ b/arch/ia64/kernel/entry.S
@@ -204,9 +204,6 @@ GLOBAL_ENTRY(ia64_switch_to)
(p6) br.cond.dpnt .map
;;
.done:
-(p6) ssm psr.ic // if we had to map, reenable the psr.ic bit FIRST!!!
- ;;
-(p6) srlz.d
ld8 sp=[r21] // load kernel stack pointer of new task
mov IA64_KR(CURRENT)=in0 // update "current" application register
mov r8=r13 // return pointer to previously running task
@@ -234,6 +231,9 @@ GLOBAL_ENTRY(ia64_switch_to)
mov IA64_KR(CURRENT_STACK)=r26 // remember last page we mapped...
;;
itr.d dtr[r25]=r23 // wire in new mapping...
+ ssm psr.ic // reenable the psr.ic bit
+ ;;
+ srlz.d
br.cond.sptk .done
END(ia64_switch_to)